Electrical coupling stack and processes for making same
View Patent ↗A process of making an electrical coupling stack is disclosed. A conductive structure is coupled to a substrate. The coupling includes a crystalline salicide first structure above the conductive structure, a nitrogen-containing amorphous salicide second structure above the crystalline salicide first structure, and a refractory metal third film above the nitrogen-containing amorphous salicide second structure. Processing includes depositing a refractory metal silicide first film over the conductive structure, depositing a refractory metal nitride second film over the refractory metal silicide first film, and depositing the refractory metal third film over the refractory metal nitride second film. Thermal processing is carried out to achieve the electrical coupling stack.
1. An electrical coupling stack structure comprising:
a conductive structure coupled to a substrate, wherein the conductive structure includes a characteristic dimension;
a crystalline salicide first structure above the conductive structure;
a nitrogen-containing amorphous salicide second structure above the crystalline salicide first structure; and
a refractory metal third film above the nitrogen-containing amorphous salicide second structure, wherein the refractory metal third film includes an average grain size that is in a range from about one-twentieth the conductive structure characteristic dimension to larger than the conductive structure characteristic dimension.
2. The electrical coupling stack structure according to claim 1 , wherein the crystalline salicide first structure is approximately TaSi 2 , wherein the amorphous salicide second structure is TaSi x N y , wherein 0.2≦x≦2, and wherein 0.01≦y≦1.
3. The electrical coupling stack structure according to claim 1 , wherein the refractory metal third film includes a transition zone, wherein the transition zone is selected from two identical metals, a metal-alloy transition zone, a metal-eutectic transition zone, and a metal-metal transition zone.
4. The electrical coupling stack structure according to claim 1 , wherein the refractory metal third film includes a transition zone, wherein the transition zone is selected from two identical metals, a metal-alloy transition zone, a metal-eutectic transition zone, and a metal-metal transition zone, wherein the conductive structure includes a source/drain structure of a substrate active area.
5. The electrical coupling stack structure according to claim 1 , wherein the refractory metal third film includes a transition zone, wherein the transition zone is selected from two identical metals, a metal-alloy transition zone, a metal-eutectic transition zone, and a metal-metal transition zone, wherein the conductive structure includes a polysilicon plug above a substrate active area, and wherein the average grain size that is in a range from about one-tenth the conductive structure characteristic dimension to larger than the conductive structure characteristic dimension.
6. The electrical coupling stack structure according to claim 1 , wherein the refractory metal third film includes a resistivity in a range from about 0.1 Ω/sq to about 300 Ω/sq.
7. A buried digit line structure comprising:
a conductive plug coupled to a substrate, wherein the conductive plug includes a characteristic dimension;
a tantalum salicide first structure above the conductive plug;
a nitrogen-containing tantalum salicide second structure above the tantalum salicide first structure; and
a tungsten third film above the nitrogen-containing tantalum salicide second structure, wherein the tungsten third film includes an average grain size that is in a range from about one-tenth the conductive plug characteristic dimension to larger than the conductive plug characteristic dimension.
8. The buried digit line structure according to claim 7 , wherein the conductive plug characteristic dimension is in a range from about a 0.25 micron geometry to about a 0.01 micron geometry.
9. The buried digit line structure according to claim 7 , wherein the tantalum salicide first film has a thickness from about 30 Å to about 300 Å, wherein the nitrogen-containing tantalum salicide second structure has a thickness from about 50 Å to about 500 Å, and wherein the tungsten third film has a thickness from about 50 Å to about 3,000 Å.
10. The buried digit line structure according to claim 7 , wherein the tantalum salicide first film has a thickness of about 130 Å, wherein the nitrogen-containing tantalum salicide second structure has a thickness of about 100 Å, and wherein the tungsten third film has a thickness of about 100 Å.
11. The buried digit line structure according to claim 7 , the tungsten third film including at least one of a second metal disposed against the nitrogen-containing tantalum salicide second structure, wherein the tungsten and the second metal form a transition zone selected from metal, metal-alloy, metal-eutectic, and metal-metal.
12. The buried digit line structure according to claim 7 , wherein the tantalum salicide first structure includes a first crystallinity, wherein the nitrogen-containing tantalum salicide second structure includes a second crystallinity that is less than the first crystallinity.
13. An electrical device comprising:
a conductive structure coupled to a substrate, wherein the conductive structure includes a characteristic dimension;
a crystalline salicide first structure above the conductive structure;
a nitrogen-containing amorphous salicide second structure above the crystalline salicide first structure; and
a refractory metal third film above the nitrogen-containing amorphous salicide second structure, wherein the refractory metal third film includes an average grain size that is in a range from about one-twentieth the conductive structure characteristic dimension to larger than the conductive plug characteristic dimension, and wherein the refractory metal third film includes a resistivity in a range from about 0.1 Ω/sq to about 300 Ω/sq.
14. The electrical device according to claim 13 , further including:
a chip package, wherein the substrate is disposed in the chip package.
15. The electrical device according to claim 13 , further including:
a chip package, wherein the substrate is disposed in the chip package; and
a host, wherein the chip package is disposed in the host.
16. The electrical device according to claim 13 , further including:
a chip package, wherein the substrate is disposed in the chip package; and
a host, wherein the chip package is disposed in the host, wherein the host includes a memory module.
17. The electrical device according to claim 13 , further including:
a chip package, wherein the substrate is disposed in the chip package; and
a host, wherein the chip package is disposed in the host, wherein the host includes a memory module; and
an electronic system, wherein the memory module is disposed in the electronic system.
18. The electrical device according to claim 13 , further including:
a chip package, wherein the substrate is disposed in the chip package;
a host, wherein the chip package is disposed in the host, wherein the host includes a dynamic random access memory module; and
an electronic system, wherein the dynamic random access memory module is disposed in the electronic system.
19. The electrical device according to claim 13 , further including:
a chip package, wherein the substrate is disposed in the chip package;
a host, wherein the chip package is disposed in the host; and
an electronic system, wherein the host is disposed in the electronic system.