IP Library Granted Patent US 7,583,724
Granted Patent B2
US 7,583,724 · App. 11/006,329 · Granted Sep 1, 2009

Low-power mixed-mode echo/crosstalk cancellation in wireline communications

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Quick Facts
Patent No.
US 7,583,724
App. No.
11/006,329
Granted
Sep 1, 2009
Kind
B2
Abstract

A signal processing system includes an AGC and pre-echo cancellation system for receiving an analog signal, amplifying signal magnitude (over all frequencies) to a pre-determined level by AGC, and removing the immediate transmit pulse from this received signal by pre-echo canceller to provide a second analog signal. The signal processing system also includes a summer for receiving the analog signal; a feed forward equalization (FFE) unit for receiving a signal from the summer; and a slicer for receiving a signal from the FFE unit and providing an output signal. The signal processing system also includes an Echo and NEXT or FEXT cancellation system for receiving the output signal and for providing a signal to the summer for canceling the echo and crosstalk in the signal processing system. The Echo and crosstalk components associated with a signal processing system can be subtracted prior to the FFE.

Claims (21)

1. A signal processing system comprising:

a summer for receiving an input signal and an interference cancelling signal;

a first feed forward equalization (FFE) unit for receiving a signal from the summer;

a slicer for receiving a signal from the FFE unit and providing an output signal;

a second FFE unit that is simpler than the first FFE unit in operation due to processing as input a finite number of states of input transmit signals, the second FFE unit filtering the input transmit signals and outputting filtered transmit signals; and

a cancellation system for receiving the filtered transmit signals and for providing the interference cancelling signal to the summer for cancelling transmit signal interference in the signal processing system.

2. The signal processing system of claim 1 wherein the cancellation system operates in an analog domain.

3. The signal processing system of claim 1 wherein the slicer comprises a low-resolution analog-to-digital converter (ADC).

4. The signal processing system of claim 1 wherein the cancellation system is a mixed signal system comprising:

a digital delay pipeline for receiving the input transmit signals, the transmit signals being digital, the digital delay pipeline delaying the transmit signals;

a plurality of digital-to-analog converters (DACs) with shared output nodes, each of the DACs receiving its input from the digital delay pipeline and performing a multiplying function including modulating a tap coefficient with data from the input transmit signals.

5. The signal processing system of claim 4 wherein

outputs of the DACs are in the form of current, and wherein summation of the outputs of the DACs is performed by current summing the outputs of the DACs.

6. The signal processing system of claim 5 wherein the DACs provide signal pre-emphasis to the outputs of the DACs to reduce a settling time error at the shared output nodes of the DACs.

7. The signal processing system of claim 1 wherein the cancellation system comprises a hybrid analog/digital system.

8. The signal processing system of claim 1 wherein coefficient calculations for the cancellation of the transmit signal interference are performed in accordance with the following equation: W n+1 (k)=W n (k)+μe n (FFE[TX]) wherein “μ” is a small constant usually less than one, that determines the rate of adaptation/convergence, “e n ” is the value of the error at the slicer unit, and FFE[TX] represents one of the filtered transmit signals.

9. The signal processing system of claim 1 wherein the cancellation of transmit signal interference in the signal processing system is performed using current summing, in which output currents of DACs of the cancellation system are summed to provide a total current to subtract from the input signal.

10. The signal processing system of claim 1 further comprising a pre-echo cancellation system and an automatic gain control (AGC) for receiving a receiver signal and providing the input signal to the summer.

11. The signal processing system of claim 1 wherein the cancellation system is an echo and crosstalk cancellation system for providing the interference cancelling signal, and wherein the transmit signal interference includes echo and crosstalk.

12. The signal processing system of claim 1 wherein the first FFE unit is an analog FFE unit.

13. The signal processing system of claim 1 wherein the second FFE unit is a digital FFE unit.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053179/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2020
From: AQUANTIA CORPORATION
To: CAVIUM INTERNATIONAL
Reel/Frame 051945/0520 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2007
From: NOVIN IP
To: AQUANTIA CORP.
Reel/Frame 019060/0170 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 14, 2006
From: SHIRANI, RAMIN
To: NOVIN IP, INC.
Reel/Frame 018518/0885 →