IP Library Assignment 051945/0520
Patent Assignment
Reel/Frame 051945/0520

Assignment of Assignor's Interest

Recorded: 2020-02-17 Pages: 22
Assignor
AQUANTIA CORPORATION
Executed: 2019-12-31
Assignee
CAVIUM INTERNATIONAL
PO BOX 1350, CLIFTON HOUSE, 75 FORT STREET, GRAND CAYMAN, KYI-1108, CAYMAN ISLANDS
Covered Properties (122)
Linear Data Recovery Phase Detector
Patent: 7,333,578 →
Application: 09/862,384 →
Publication: US 2002/0009167
Analog N-Tap Fir Receiver Equalizer
Patent: 7,167,517 →
Application: 09/863,081 →
Publication: US 2001/0043649
Method and Apparatus for Domain Transformation Multiple Signal Processing
Patent: 7,227,883 →
Application: 10/695,166 →
Publication: US 2005/0088961
Full Duplex Transceiver
Patent: 7,333,448 →
Application: 10/699,761 →
Publication: US 2005/0094583
Sub-Block Domain Transformation Multiple Signal Processing
Patent: 7,366,231 →
Application: 10/816,409 →
Publication: US 2005/0089101
Low-Power Receiver Decoding
Patent: 7,747,923 →
Application: 10/926,699 →
Publication: US 2006/0047857
Low-Power Low-Voltage Multi--Level Variable-Resistor Line Driver
Patent: 7,221,196 →
Application: 10/993,107 →
Publication: US 2005/0122143
Low-Power Mixed-Mode Echo/Crosstalk Cancellation in Wireline Communications
Patent: 7,583,724 →
Application: 11/006,329 →
Publication: US 2005/0123081
Efficient Decoding
Patent: 7,461,328 →
Application: 11/090,109 →
Publication: US 2006/0218458
Single Amplifier Presample Processing Circuitry
Patent: 7,466,746 →
Application: 11/148,988 →
Publication: US 2006/0280234
Low-Power Low-Voltage Multi-Level Variable-Resistor Line Driver
Patent: 7,528,629 →
Application: 11/198,070 →
Publication: US 2006/0103424
Receiver Adc Clock Delay Based on Echo Signals
Patent: 7,720,015 →
Application: 11/205,615 →
Publication: US 2007/0042721
Multiple Modulation Rate 10GBASE-T Transmission
Patent: 7,782,852 →
Application: 11/247,805 →
Publication: US 2007/0081475
Transceiver Power Backoff
Patent: 7,646,699 →
Application: 11/303,364 →
Publication: US 2007/0140289
Method and Apparatus for Cancelling Interference in a Communication System
Patent: 7,706,434 →
Application: 11/405,346 →
Optimization of Low Density Parity Check (Ldpc) Building Blocks Using Multi-Input Gilbert Cells
Patent: 7,669,106 →
Application: 11/405,646 →
Master/Slave Transceiver Power Back-Off
Patent: 7,860,020 →
Application: 11/438,177 →
Publication: US 2007/0269022
Method and Apparatus for Extending Decoding Time in an Iterative Decoder Using Input Codeword Pipelining
Patent: 7,577,891 →
Application: 11/442,485 →
Publication: US 2007/0011573
Method and Apparatus for Providing Leakage Current Compensation in Electrical Circuits
Patent: 7,663,412 →
Application: 11/451,220 →
Method and Apparatus for Rectifying Errors in the Presence of Known Trapping Sets in Iterative Decoders and Expedited Bit Error Rate Testing
Patent: 7,739,558 →
Application: 11/474,158 →
Linear-Equivalent Echo and Next Cancellers for Tomlinson-Harashima Precoding (Thp) Systems
Patent: 8,279,783 →
Application: 11/501,324 →
Compensation Technique for Current Source Channel-Length Modulation
Patent: 7,589,567 →
Application: 11/508,593 →
Multiple Transmission Protocol Transceiver
Patent: 7,782,929 →
Application: 11/510,934 →
Publication: US 2008/0049818
Efficient Message Passing Scheme of Iterative Error Correcting Decoders
Patent: 7,818,649 →
Application: 11/607,416 →
Aiding Synchronization Between Master and Slave Transceivers
Patent: 7,729,464 →
Application: 11/644,598 →
Publication: US 2008/0151792
Low Power Iterative Decoder Using Input Data Pipelining and Voltage Scaling
Patent: 7,805,642 →
Application: 11/676,946 →
Digital Implementation of an Enhanced Minsum Algorithm for Error Correction in Data Communications
Patent: 7,797,613 →
Application: 11/678,054 →
Method and Apparatus for Domain Transformation Multiple Signal Processing
Patent: 7,362,791 →
Application: 11/702,348 →
Publication: US 2007/0165734
Multi-Level Variable-Resistor Line Driver
Patent: 7,532,048 →
Application: 11/738,864 →
Optimized Correction Factor for Low-Power Min-Sum Low Density Parity Check Decoder (Ldpc)
Patent: 8,281,210 →
Application: 12/118,650 →
Energy Efficiency Ethernet (Eee) with 10GBASE-T Structures
Patent: 8,854,986 →
Application: 12/118,664 →
Digital-To-Analog Converter (Dac) for High Frequency and High Resolution Environments
Patent: 7,675,450 →
Application: 12/139,447 →
Efficient Decoding
Patent: 7,634,710 →
Application: 12/217,962 →
Publication: US 2008/0304576
Iterative Decoder Using Input Data Pipelining and Time Interleaved Processing
Patent: 8,234,536 →
Application: 12/247,833 →
Controlling Activation of Electronic Circuitry of Data Ports of a Communication System
Patent: 7,881,330 →
Application: 12/290,181 →
Publication: US 2010/0104056
Trapping Set Decoding for Transmission Frames
Patent: 8,020,070 →
Application: 12/329,514 →
Publication: US 2009/0150745
Compensation of Ethernet Transmit Baseline Wander
Patent: 8,098,768 →
Application: 12/369,702 →
Publication: US 2009/0202003
Low-Power Idle Mode for Network Transceiver
Patent: 8,156,359 →
Application: 12/563,927 →
Cancellation of Alien Interference in Communication Systems
Patent: 9,912,375 →
Application: 12/563,938 →
Common Mode Detector for a Communication System
Patent: 8,928,425 →
Application: 12/604,323 →
Magnetic Package for a Communication System
Patent: 8,284,007 →
Application: 12/604,343 →
Rejecting Rf Interference in Communication Systems
Patent: 8,625,704 →
Application: 12/604,351 →
Fast Retraining for Transceivers in Communication Systems
Patent: 8,320,411 →
Application: 12/604,358 →
Efficient Decoding
Patent: 8,234,550 →
Application: 12/613,627 →
Publication: US 2010/0058143
Reducing Electromagnetic Interference in a Received Signal
Patent: 9,118,469 →
Application: 12/789,728 →
Publication: US 2011/0296267
Reducing Electromagnetic Interference in a Receive Signal with an Analog Correction Signal
Patent: 8,792,597 →
Application: 12/818,549 →
Publication: US 2011/0310936
Method and Apparatus for Fast Link Recovery
Patent: 8,804,793 →
Application: 12/857,080 →
Publication: US 2012/0014420
Master/Slave Transceiver Power Back-Off
Patent: 8,520,562 →
Application: 12/941,039 →
Publication: US 2011/0051620
Adjustable Latency Transceiver Processing
Patent: 8,804,794 →
Application: 12/960,474 →
Publication: US 2012/0140797
Controlling Activation of Electronic Circuitry of Data Ports of a Communication System
Patent: 8,885,662 →
Application: 12/960,481 →
Publication: US 2011/0074592
Crosstalk Cancellation for a Common-Mode Channel
Patent: 8,442,099 →
Application: 12/977,844 →
Methods and Apparatus for Correcting Block-Coded Data Errors with an Error Detection Code
Patent: 8,930,799 →
Application: 13/039,099 →
Variable Resistor Voltage Driver with Self-Noise Compensation Circuit
Patent: 8,508,252 →
Application: 13/107,659 →
Publication: US 2012/0001661
Electromagnetic Interference Reduction in Wireline Applications Using Differential Signal Compensation
Patent: 8,724,678 →
Application: 13/111,785 →
Publication: US 2011/0292977
Energy Efficient Ethernet (EEE) With 10GBase-T Structures
Patent: 8,675,504 →
Application: 13/168,251 →
Publication: US 2011/0249686
High-Speed Ethernet Transceiver Calibration with Echo Canceller Reuse
Patent: 8,891,383 →
Application: 13/171,380 →
Publication: US 2011/0317564
Trapping Set Decoding for Transmission Frames
Patent: 8,196,016 →
Application: 13/190,288 →
Crosstalk Cancellation for a Multiport Ethernet System
Patent: 8,659,986 →
Application: 13/190,419 →
Transceiver Spectrum Control for Cross-Talk Mitigation
Patent: 8,804,798 →
Application: 13/235,283 →
Publication: US 2013/0070823
Voltage Mode Driver with Enhanced Transmit Hybrid Circuit
Patent: 9,048,934 →
Application: 13/346,534 →
Correlated Noise Canceller for High-Speed Ethernet Receivers
Patent: 8,861,663 →
Application: 13/350,624 →
Clock Recovery System
Patent: 9,076,366 →
Application: 13/398,748 →
Publication: US 2013/0214829
Precoder Coefficient Optimization Method and Apparatus for Communications Systems
Patent: 8,611,451 →
Application: 13/409,061 →
Adaptive Rate Control of 10GBASE-T Data Transport System
Patent: 9,130,695 →
Application: 13/413,029 →
Common-Mode Detection with Magnetic Bypass
Patent: 8,929,468 →
Application: 13/523,826 →
High-Speed Ethernet Diagnostic Apparatus and Method for Cross-Pair Faults
Patent: 9,942,125 →
Application: 13/625,820 →
Flexible Data Transmission Scheme Adaptive to Communication Channel Quality
Patent: 9,001,872 →
Application: 13/671,132 →
Electromagnetic Interference Reduction in Wireline Applications Using Differential Signal Compensation
Patent: 8,891,595 →
Application: 13/790,333 →
Rejecting Rf Interference in Communication Systems
Patent: 9,590,695 →
Application: 13/965,635 →
Sub-Rate Codes Within the 10GBASE-T Frame Structure
Patent: 9,485,335 →
Application: 13/966,208 →
Master/Slave Transceiver Power Back-Off
Patent: 8,804,582 →
Application: 13/974,551 →
Multi-Mode Network Access Device
Application: 14/180,082 →
Method and System for Ethernet Transceiver Rate Control
Application: 14/459,260 →
Flexible Data Transmission Scheme Adaptive to Communication Channel Quality
Patent: 9,281,916 →
Application: 14/634,605 →
Publication: US 2015/0171991
Adaptive Rate Control of Nbase-T Data Transport System
Patent: 9,807,208 →
Application: 14/843,394 →
Publication: US 2015/0381777
Ethernet Controller with Integrated Multi-Media Payload De-Framer and Mapper
Application: 14/858,902 →
Ethernet Controller with Integrated Avb Control Point and Time Slave
Application: 14/858,918 →
Nbase-T Phy-to-Phy Information Exchange Method and Apparatus
Patent: 9,742,465 →
Application: 14/961,797 →
On-Chip Alien Crosstalk Characterization and Diagnostics
Application: 14/961,802 →
Network Switch Apparatus and Methods for Global Alien Crosstalk Characterization, Diagnostics and Network Optimization
Application: 14/961,806 →
Rapid Rate Adaptation in Nbase-T Ethernet
Application: 14/961,810 →
Reed-Solomon Coding for 40GBASE-T Ethernet
Patent: 9,774,420 →
Application: 14/995,141 →
Intelligent Power Balancing for Nbase-T Ethernet
Application: 15/011,384 →
Methods and Apparatus to Improve Snr for Signaling Across Multi-Channel Cables
Application: 15/063,468 →
Methods and Apparatus to Improve Snr for Signaling Across Multi-Channel Cables
Patent: 9,893,756 →
Application: 15/063,474 →
High-Speed Ethernet Coding
Patent: 9,853,769 →
Application: 15/065,753 →
Methods and Apparatus for Phy Register Access
Application: 15/083,041 →
Flexible Data Transmission Scheme Adaptive to Communication Channel Quality
Application: 15/175,516 →
Ethernet Over a Reduced Number of Twisted Pair Channels
Application: 15/222,742 →
Method and Apparatus for Asymmetric Ethernet
Application: 15/228,161 →
Ethernet Controller with Integrated Tsn/Avb Control Point and Time Slave
Application: 15/276,250 →
High-Bandwidth Home Network Over Phone Line
Application: 15/276,259 →
Efficient Signaling Scheme for High-Speed Ultra Short Reach Interfaces
Application: 15/364,030 →
Far End Crosstalk Cancellation for Serdes Links
Application: 15/398,583 →
Efficient Signaling Scheme for High-Speed Ultra Short Reach Interfaces
Application: 15/451,920 →
Dual-Duplex Link with Independent Transmit and Receive Phase Adjustment
Application: 15/478,046 →
Dual-Duplex Link with Asymmetric Data Rate Selectivity
Application: 15/478,051 →
Method and System for Ethernet Active-Pair Detection
Application: 15/620,618 →
Alien Crosstalk Cancellation for a Multiport Ethernet System
Application: 15/669,717 →
Nbase-T Phy-to-Phy Information Exchange Method and Apparatus
Application: 15/683,618 →
High-Speed Ethernet Coding
Application: 15/853,504 →
Ethernet Controller with Integrated Tsn/Avb Control Point and Time Slave
Application: 16/057,609 →
Efficient Signaling Scheme for High-Speed Ultra Short Reach Interfaces
Application: 16/112,583 →
Flexible Data Transmission Scheme Adaptive to Communication Channel Quality
Application: 16/114,084 →
Energy Efficient Ethernet with Multiple Low-Power Modes
Application: 16/143,254 →
Adaptive Energy Efficient Ethernet
Application: 16/162,751 →
Apparatus and Method for High-Speed Ethernet Over Star Quad Media
Application: 16/171,298 →
Hybrid Return-to-Zero Voltage-Mode Dac Driver
Application: 16/354,512 →
Voltage-Mode Dac Driver with Parallel Output Resistance Tuning
Application: 16/354,525 →
Voltage-Mode Dac Driver with Programmable Mode Output Units
Application: 16/354,542 →
Rapid Training Method for High-Speed Ethernet
Application: 16/362,479 →
Method and Apparatus for Efficient Fast Retraining of Ethernet Transceivers
Application: 16/362,494 →
Method and Apparatus for Fast Retraining of Ethernet Transceivers Based on Trickling Error
Application: 16/362,500 →
Multi-Chip Module with Configurable Multi-Mode Serial Link Interfaces
Application: 16/365,510 →
Apparatus and Method for Simultaneous Bidirectional Serial Lanes Over Usb-C Interface
Application: 16/419,585 →
Optimized Multi-Pam Finite Impulse Response (Fir) Filter
Application: 16/419,625 →
Asymmetric Energy Efficient Ethernet
Application: 16/419,643 →
Apparatus and Method for Application-Aware Network Traffic Management
Application: 16/514,844 →
Apparatus and Method for Mac Address Override for Ethernet Adapters
Application: 16/537,008 →
Ethernet Link Transmit Power Method Based on Alien Crosstalk Feedback
Application: 16/554,000 →
Ethernet Link Transmit Power Method Based on on-Chip Detected Alien Crosstalk Feedback
Application: 16/554,023 →
Ethernet Link Transmit Power Method Based on Network Provided Alien Crosstalk Feedback
Application: 16/554,036 →
Related Assignments (7)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Sep 21, 2012
From: PLX TECHNOLOGY, INC.; TERANETICS, INC.
To: AQUANTIA CORPORATION
Reel/Frame 029006/0838 →
Corrective Assignment to Correct the Assignee Name Previously Recorded on Reel 016679 Frame 0063. Assignor(S) Hereby Confirms the Change of Assignee from "Teranetics Incorporated" to Read "Teranetics, Inc." as Indicated in the Executed Assignment.. Jan 17, 2013
From: GUPTA, SANDEEP KUMAR
To: TERANETICS, INC.
Reel/Frame 029660/0300 →
Corrective Assignment to Correct the Assignee Name Previously Recorded on Reel 016429 Frame 0517. Assignor(S) Hereby Confirms the Change of Assignee from "Teranetics Incorporated" to "Teranetics, Inc." as Indicated in the Executed Assignment.. Jan 17, 2013
From: DABIRI, DARIUSH; BAROT, NITIN
To: TERANETICS, INC.
Reel/Frame 029660/0308 →
Corrective Assignment to Correct the Assignee Name Previously Recorded on Reel 016892 Frame 0673. Assignor(S) Hereby Confirms the Change of Assignee from "Teranetics Incorporated" to Read "Teranetics, Inc." as Indicated in the Executed Assignment.. Jan 17, 2013
From: GUPTA, SANDEEP KUMAR; TELLADO, JOSE
To: TERANETICS, INC.
Reel/Frame 029660/0318 →
Corrective Assignment to Correct the Assignee Name Previously Recorded on Reel 017397 Frame 0741. Assignor(S) Hereby Confirms the Change of Assignee from "Teranetics Incorporated" to Read "Teranetics, Inc." as Indicated in the Executed Assignment.. Jan 17, 2013
From: TELLADO, JOSE; KASTURIA, SANJAY
To: TERANETICS, INC.
Reel/Frame 029660/0340 →
Corrective Assignment to Correct the Assignee Name Previously Recorded on Reel 017088 Frame 0595. Assignor(S) Hereby Confirms the Change of Assignee from "Teranetics Incorporated" to Read "Teranetics, Inc." as Indicated in the Executed Assignment.. Jan 17, 2013
From: TELLADO, JOSE; KASTURIA, SANJAY
To: TERANETICS, INC.
Reel/Frame 029660/0344 →
Assignment of Assignor's Interest May 15, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053179/0320 →