IP Library Granted Patent US 7,881,330
Granted Patent B2
US 7,881,330 · App. 12/290,181 · Granted Feb 1, 2011

Controlling activation of electronic circuitry of data ports of a communication system

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Quick Facts
Patent No.
US 7,881,330
App. No.
12/290,181
Granted
Feb 1, 2011
Kind
B2
Abstract

An apparatus and method of controlling activation of electronic circuitry of data ports of a communication system is disclosed. One method includes a first data port detecting a lack of data for transmission to a second data port. At least one of the first data port and a second data port deactivate electronic circuitry of at least one of the first and second data ports upon detection of the lack of data. The first and second data ports maintain synchronization with each other while the electronic circuitry is deactivated by periodically exchanging synchronization test patterns. At least one of the first data port and the second data port transmit an alert to the other of the first and second data port when data for communication is detected. The other of the first data port and the second data port activate electronic circuitry upon receiving the alert. At least one of the first data port and the second data port transmit data.

Claims (63)

1. A method of controlling activation of electronic circuitry of data ports of a communication system, comprising:

a first data port detecting a lack of data for transmission to a second data port;

at least one of the first data port and a second data port deactivating electronic circuitry of at least one of the first and second data ports;

the first and second data ports maintaining synchronization with each other while the electronic circuitry is deactivated by periodically exchanging synchronization test patterns;

at least one of the first data port and the second data port transmitting an alert to the other of the first and second data port when data for communication is detected;

the other of the first data port and the second data port activating electronic circuitry upon receiving the alert;

at least one of the first data port and the second data port transmitting data;

wherein data communication between the first data port and the second data port includes a plurality wired connections connected to the first data port and the second data port, and the alert is transmitted over a subset of the plurality of wired connections;

further comprising selecting a first alert signal for a master transceiver data port, and selecting a second alert signal for a slave transceiver data port, wherein the first alert signal comprises a series of symbols, and the second alert signal comprises the series of symbols in a reverse order.

2. The method of claim 1 , further comprising:

designating predetermined time slots;

transmitting the alert during at least one of the predetermined time slots.

3. The method of claim 2 , further comprising adaptively selecting a time period between the predetermined time slots.

4. The method of claim 2 , further comprising adaptively selecting a time-duration of each of the predetermined time slots.

5. The method of claim 4 , wherein the time-duration of the predetermined time slots is adaptively selected based on a desired latency of data transmission.

6. The method of claim 2 , further comprising adaptively selecting a time-duration of the alerts.

7. The method of claim 1 , further comprising:

configuring the alert to comprise a high-autocorrelation signal.

8. The method of claim 7 , wherein configuring the alert to comprise a high-autocorrelation signal comprises selecting a pre-selected signal format.

9. The method of claim 7 , further comprising configuring the alert to have a baud rate less than a baud rate of the data.

10. The method of claim 1 , wherein the first alert signal is uncorrelated with second alert signal.

11. The method of claim 1 , wherein the first alert signal comprises a series of symbols, and the second alert signal comprises the series of symbols in a reverse order.

12. The method of claim 1 , further comprising a master transceiver data port transmitting alert signals on a first wired connection and a slave transceiver data port transmitting alert signals on a second wired connection.

13. A method of controlling activation of electronic circuitry of data ports of a communication system, comprising:

a first data port detecting a lack of data for transmission to a second data port;

at least one of the first data port and a second data port deactivating electronic circuitry of at least one of the first and second data ports;

the first and second data ports maintaining synchronization with each other while the electronic circuitry is deactivated by periodically exchanging synchronization test patterns;

at least one of the first data port and the second data port transmitting an alert to the other of the first and second data port when data for communication is detected;

the other of the first data port and the second data port activating electronic circuitry upon receiving the alert;

at least one of the first data port and the second data port transmitting data;

designating predetermined time slots;

transmitting the alert during at least one of the predetermined time slots;

adaptively selecting a time period between the predetermined time slots;

wherein the time period between the predetermined time slots is adaptively selected based on at least one of a buffer size of at least one of the first data port and the second data port.

14. A method of controlling activation of electronic circuitry of data ports of a communication system, comprising:

a first data port detecting a lack of data for transmission to a second data port;

at least one of the first data port and a second data port deactivating electronic circuitry of at least one of the first and second data ports;

the first and second data ports maintaining synchronization with each other while the electronic circuitry is deactivated by periodically exchanging synchronization test patterns;

at least one of the first data port and the second data port transmitting an alert to the other of the first and second data port when data for communication is detected;

the other of the first data port and the second data port activating electronic circuitry upon receiving the alert;

at least one of the first data port and the second data port transmitting data;

configuring the alert to have an autocorrelation peak signal level at least a predetermined amount greater than echo signal interference.

15. A method of controlling activation of electronic circuitry of data ports of a 10G Ethernet system, comprising:

a first data port detecting a lack of data;

at least one of the first data port and a second data port deactivating electronic circuitry of at least one of the first and second data ports;

the first and second data ports maintaining synchronization with each other while the electronic circuitry is deactivated by periodically exchanging synchronization test patterns;

at least one of the first data port and the second data port transmitting an alert to the other of the first and second data port when data for communication is detected;

the other of the first data port and the second data port activating electronic circuitry upon receiving the alert;

the first data port and the second data port exchanging data;

wherein data communication between the first data port and the second data port includes a plurality wired connections connected to the first data port and the second data port, and the alert is transmitted over a subset of the plurality of wired connections;

further comprising selecting a first alert signal for a master transceiver data port, and selecting a second alert signal for a slave transceiver data port, wherein the first alert signal comprises a series of symbols, and the second alert signal comprises the series of symbols in a reverse order.

16. A method of controlling activation of electronic circuitry of a data port of a communication system, comprising:

the data port detecting a lack of data for transmission to a second data port;

the data port deactivating electronic circuitry of the data port if a lack of data is detected;

the data port and a second data port maintaining synchronization with each other while the electronic circuitry is deactivated by periodically exchanging synchronization test patterns;

the data port transmitting an alert to the second data port when data for communication is detected;

the data port transmitting data;

wherein data communication between the data port and the second data port includes a plurality wired connections connected to the data port and the second data port, and the alert is transmitted over a subset of the plurality of wired connections;

further comprising selecting a first alert signal for a master transceiver data port, and selecting a second alert signal for a slave transceiver data port, wherein the first alert signal comprises a series of symbols, and the second alert signal comprises the series of symbols in a reverse order.

17. The method of claim 16 , further comprising:

designating predetermined time slots;

transmitting the alert during at least one of the predetermined time slots.

18. The method of claim 17 , further comprising adaptively selecting a time period between the predetermined time slots.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053179/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2020
From: AQUANTIA CORPORATION
To: CAVIUM INTERNATIONAL
Reel/Frame 051945/0520 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 21, 2012
From: PLX TECHNOLOGY, INC.; TERANETICS, INC.
To: AQUANTIA CORPORATION
Reel/Frame 029006/0838 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 28, 2011
From: TERANETICS, INC.
To: PLX TECHNOLOGY, INC.
Reel/Frame 026517/0802 →
CORRECTIVE ASSIGNMENT TO CORRECT THE RECEIVING PARTY FROM "TERANETICS PATENT DEPARTMENT" TO --TERANETICS, INC.-- PREVIOUSLY RECORDED ON REEL 021814 FRAME 0595. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT DOCUMENT. Recorded Jun 3, 2011
From: TAICH, DIMITRY; TELLADO, JOSE
To: TERANETICS, INC.
Reel/Frame 026390/0939 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 28, 2008
From: TAICH, DIMITRY; TELLADO, JOSE
To: TERANETICS PATENT DEPARTMENT
Reel/Frame 021814/0595 →