IP Library Granted Patent US 11,139,800
Granted Patent B1
US 11,139,800 · App. 16/419,625 · Granted Oct 5, 2021

Optimized multi-pam finite impulse response (FIR) filter

Inventors: Oliver Weiss (Kaarst, DE); Martin Broich (Aachen, DE)
Assignee: Marvell Asia Pte, Ltd.
H03H21/0025H03H17/0255H03H2017/0081
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Quick Facts
Patent No.
US 11,139,800
App. No.
16/419,625
Granted
Oct 5, 2021
Kind
B1
Abstract

A receiver circuit is disclosed. The receiver circuit includes a multi-PAM input circuit to receive a multi-PAM input symbol. The input symbol exhibits one of multiple threshold levels during a sampling period. The threshold levels correspond to a set of M-bit two's-complement values within a defined set of threshold values. An adaptive filtering circuit includes a first transcoder to transcode the set of M-bit two's-complement values to a set of N-bit values, where N<M. An adaptive filter operates to filter the set of N-bit values to generate a filtered set of data values. A second transcoder transforms the filtered set of data values to a second set of data values that corresponds to a set of filtered M-bit two's-complement values.

Claims (42)

1. A receiver circuit, comprising:

a multi-PAM input circuit configured to receive a multi-PAM input symbol, the input symbol exhibiting a signal level that falls within one of multiple signal ranges during a sampling period, the signal ranges corresponding to a first set of M-bit two's-complement values, the multi-PAM input circuit configured to identify the input symbol signal level and corresponding M-bit two's-complement code corresponding to the identified signal level; and

an adaptive filtering circuit including

a first transcoder to transcode the identified M-bit two's-complement code to an N-bit code representing a value from a set of N-bit two's complement values, wherein N<M;

an adaptive filter to receive the N-bit code and to generate a filtered data value; and

a second transcoder to transform the filtered data value to a second data value that corresponds to a filtered M-bit two's-complement value.

2. The receiver circuit according to claim 1 , wherein:

the multi-PAM input circuit comprises a PAM4 input circuit to receive PAM4 input symbols.

3. The receiver circuit according to claim 2 , wherein the first set of M-bit two's complement values comprises:

a set of 3-bit two's-complement values corresponding to the set (−3, −1, +1, +3).

4. The receiver circuit according to claim 2 , wherein the second set of N-bit two's complement values comprises:

a set of 2-bit two's-complement values corresponding to the set (−2, −1, 0, +1).

5. The receiver circuit according to claim 2 , wherein:

the adaptive filter comprises a finite impulse response (FIR) filter.

6. The receiver circuit according to claim 5 , wherein:

the adaptive filter includes at least three taps.

7. The receiver circuit according to claim 6 , wherein:

each of the at least three taps generates a single partial product; and

the adaptive filter is configured to generate a sum of the single partial products from each of the at least three taps.

8. An adaptive filtering circuit including

a first transcoder to transcode a multi-PAM input symbol encoded in a first M-bit two's-complement value to an N-bit value, wherein N<M;

an adaptive filter to receive the N-bit value and generate a filtered data value; and

a second transcoder to transform the filtered data value to a second data value that corresponds to a filtered M-bit two's-complement value.

9. The adaptive filter circuit according to claim 8 , wherein the first M-bit two's complement values comprises:

a 3-bit two's-complement value corresponding to one from the set of values represented by (−3, −1, +1, +3).

10. The adaptive filter circuit according to claim 8 , wherein the N-bit value comprises:

a 2-bit value corresponding to one from the set of values represented by (−2, −1, 0, +1).

11. The adaptive filter circuit according to claim 8 , embodied as a finite impulse response (FIR) filter.

12. The adaptive filter circuit according to claim 11 , further comprising:

at least three taps.

13. The adaptive filter circuit according to claim 12 , wherein:

each of the at least three taps generates a single partial product; and

the adaptive filter is configured to generate a sum of the single partial products from each of the at least three taps.

14. A method of operation for a receiver circuit, the method comprising:

receiving a multi-PAM input symbol, the input symbol exhibiting a signal level that falls within one of multiple signal ranges during a sampling period, the signal ranges corresponding to a first set of M-bit two's-complement values;

identifying the input symbol signal level and corresponding M-bit two's-complement code corresponding to the identified signal level; and

adaptively filtering the multi-PAM input symbol, including

transcoding the identified M-bit two's-complement code, with a first transcoder, to an N-bit code representing a value from a set of N-bit two's complement values, wherein N<M;

adaptively filtering the N-bit code to generate a filtered data value; and

recoding the filtered data value to a second data value that corresponds to a filtered M-bit two's-complement value.

15. The method according to claim 14 , wherein:

the receiving of the multi-PAM input symbol comprises receiving a PAM4 input symbol.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053179/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2020
From: AQUANTIA CORPORATION
To: CAVIUM INTERNATIONAL
Reel/Frame 051945/0520 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 22, 2019
From: WEISS, OLIVER; BROICH, MARTIN
To: AQUANTIA CORP.
Reel/Frame 049257/0121 →
Cited By (1)
US 12,525,962