Asymmetric energy efficient ethernet
An Ethernet transceiver is disclosed. The Ethernet transceiver includes transceiver circuitry to couple to one end of an Ethernet link. The transceiver circuitry includes transmit circuitry to transmit high-speed Ethernet data along the Ethernet link at a first data rate and receiver circuitry. The receiver circuitry includes adaptive filter circuitry and correlator circuitry. The receiver circuitry is responsive to an inline signal to operate in a low-power alert mode with the adaptive filter circuitry disabled and to receive alert signals from the Ethernet link simultaneous with transmission of the Ethernet data by the transmit circuitry. The alert signals are detected by the correlator circuitry and include a sequence of alert intervals exhibiting encoded data at a second data rate less than the first data rate.
1. An Ethernet transceiver, comprising:
transceiver circuitry to couple to one end of an Ethernet link, the transceiver circuitry including
transmit circuitry to transmit high-speed Ethernet data along the Ethernet link at a first data rate;
receiver circuitry including
adaptive filter circuitry, and
correlator circuitry; and
wherein the receiver circuitry is responsive to an inline signal to operate in a low-power alert mode with the adaptive filter circuitry disabled and to receive alert signals from the Ethernet link simultaneous with transmission of the Ethernet data by the transmit circuitry, the alert signals detected by the correlator circuitry and comprising a sequence of alert intervals exhibiting encoded data at a second data rate less than the first data rate.
2. The Ethernet transceiver of claim 1 , wherein:
the alert signals correspond to an alert burst, each alert burst including multiple data bits encoded in the sequence of alert intervals.
3. The Ethernet transceiver of claim 2 , wherein:
each alert burst includes thirty-three alert intervals to encode sixteen data bits.
4. The Ethernet transceiver of claim 3 , wherein:
the thirty-three alert intervals include seventeen odd intervals for alert clock pulses and sixteen even intervals for data encoding.
5. The Ethernet transceiver of claim 1 , wherein:
the receiver circuitry is responsive to an autonegotiation signal to exit the low-power alert mode.
6. The Ethernet transceiver of claim 1 , wherein:
the Ethernet link comprises a single bidirectional signaling lane coupled to the transmit circuitry and the receiver circuitry.
7. The Ethernet transceiver of claim 1 , wherein:
the Ethernet link comprises a dedicated transmit lane for coupling to the transmit circuitry and a dedicated receive lane for coupling to the receiver circuitry.
8. A method of operation for an Ethernet transceiver, comprising:
operating receiver circuitry in a powered-up state;
receiving first data with the receiver circuitry from a link partner Ethernet transceiver at a first data rate;
encoding second data into multiple alert signals for transmission to the link partner Ethernet transceiver; and
transmitting the multiple alert signals with transmit circuitry to the link partner Ethernet transceiver at a second data rate less than the first data rate.
9. The method of claim 8 , wherein:
the alert signals correspond to an alert burst, each alert burst including multiple data bits encoded in the sequence of alert intervals.
10. The Ethernet network of claim 9 , wherein:
each alert burst includes thirty-three alert intervals to encode sixteen data bits.
11. The Ethernet network of claim 10 , wherein:
the thirty-three alert intervals include seventeen odd intervals for alert clock pulses and sixteen even intervals for data encoding.
12. The Ethernet network of claim 8 , wherein:
the transmit circuitry transmits an autonegotiation signal to the link partner Ethernet transceiver to exit the low-power alert mode.
13. The Ethernet network of claim 12 , wherein:
the transmitting of the multiple alert signals is carried out simultaneous with the receiving of the first data.
14. A method of operation for an Ethernet transceiver, comprising:
operating receiver circuitry in a powered-down state;
transmitting first data with transmit circuitry to a link partner Ethernet transceiver at a first data rate;
receiving multiple alert signals from the link partner Ethernet transceiver during a low-power alert mode of operation, the multiple alert signals encoded with second data and received at a second data rate less than the first data rate; and
decoding the received encoded second data.
15. The method of claim 14 , wherein:
the alert signals correspond to an alert burst, each alert burst including multiple data bits encoded in the sequence of alert intervals.
16. The method of claim 15 , wherein:
each alert burst includes thirty-three alert intervals to encode sixteen data bits.
17. The method of claim 16 , wherein:
the thirty-three alert intervals include seventeen odd intervals for alert clock pulses and sixteen even intervals for data encoding.
18. The method of claim 14 , wherein:
the transmit circuitry transmits an autonegotiation signal to the link partner Ethernet transceiver to exit the low-power alert mode.
19. The method of claim 14 , wherein:
the Ethernet transceiver operates in accordance with a 10GBASE-T Ethernet protocol.
20. The method of claim 14 , wherein:
the receiving of the multiple alert signals is carried out simultaneous with the transmitting of the first data.