IP Library Granted Patent US 7,466,746
Granted Patent B2
US 7,466,746 · App. 11/148,988 · Granted Dec 16, 2008

Single amplifier presale processing circuitry

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Quick Facts
Patent No.
US 7,466,746
App. No.
11/148,988
Granted
Dec 16, 2008
Kind
B2
Abstract

An device and method for a pre-sampling processing is disclosed. The pre-sampling device includes a single amplifier having a virtual ground node, and a feed back circuit connected from an output of the amplifier to the virtual ground node. The feed back circuit includes a plurality of switches connected to the virtual ground node. The switches control a plurality of programmable gain settings. The feed back circuit also includes an adjustable current source that is adjusted according to an estimated echo signal. A current of the adjustable current source is summed at the virtual ground node. The feed back circuit also includes a low pass filter that is tuned to suppress received signal frequencies above a fraction of a sampling frequency of a sampler connected to the pre-sampling device.

Claims (40)

1. A transceiver pre-sampling device comprising:

a single amplifier having a virtual ground node;

a feed back circuit from an output of the amplifier to the virtual ground node, the feed back circuit comprising;

a plurality of switches connected to the virtual ground node, the switches setting a plurality of programmable gain settings;

an adjustable current source, a current of the adjustable current source being summed at the virtual ground node, the adjustable current source being adjusted according to an estimated echo signal;

a low pass filter tuned to suppress received signal frequencies above a fraction of a sampling frequency of a sampler connected to the pre-sampling device.

2. The transceiver pre-sampling device of claim 1 , wherein an output impedance of the single amplifier is much greater than an output load impedance of the single amplifier.

3. The transceiver pre-sampling device of claim 1 , wherein an output impedance of the single amplifier is much less than an output load impedance of the single amplifier.

4. The transceiver pre-sampling device of claim 1 , wherein each of the plurality of switches are connected to a resistive elements, and the programmable gain settings are dependent upon which switches are closed.

5. The transceiver pre-sampling device of claim 4 , wherein each switch corresponds with a resistor of a resistive ladder, and the resistive ladder sets a feedback resistance.

6. The transceiver pre-sampling device of claim 1 , wherein pre-sampling device is within a transceiver, and an input signal to the pre-sampling device comprises a received signal and an echo signal of the transceiver.

7. The transceiver pre-sampling device of claim 6 , further including only the current of the adjustable current source being conducted through the plurality of switches, and the received signal and cancelled echo current being conducted through feedback of the amplifier.

8. The transceiver pre-sampling device of claim 7 , further including the adjustable current canceling current induced by the echo signal, thereby improving linearity of the single amplifier.

9. The transceiver pre-sampling device of claim 6 , wherein the echo signal is determined by a transmitted signal, and a replica of the transmitted signal is connected to an echo cancellation DAC, and wherein the echo cancellation DAC generates the adjustable current.

10. The transceiver pre-sampling device of claim 9 , wherein the replica of the transmitted signal is gain and phase adjusted before being received by the echo cancellation DAC.

11. The transceiver pre-sampling device of claim 6 , wherein the echo signal is adaptively determined by a transmitted signal, and reflections of the transmitted signal, and an echo cancellation DAC generates the adjustable current as controlled by an adaptive DSP controller.

12. A method of processing a transceiver signal before sampling, comprising:

supplying a received signal and echo signal to a preprocessing circuit, the preprocessing circuit comprising an amplifier;

summing a current of an adjustable current source to a virtual ground node of the amplifier, the adjustable current source being adjusted according to an estimated echo signal;

setting a programmable gain setting of a plurality of switches connected to the virtual ground node; and

anti-alias filtering the received signal as determined by a virtual ground node capacitance and an amplifier output capacitance.

13. The method of processing a transceiver signal of claim 12 , wherein an output impedance of the single amplifier is much greater than an output load impedance of the single amplifier.

14. The method of processing a transceiver signal of claim 12 , wherein an output impedance of the single amplifier is much less than an output load impedance of the single amplifier.

15. The method of processing a transceiver signal of claim 12 , wherein each of the plurality of switches are connected to a resistive elements, and the programmable gain settings are dependent upon which switches are closed.

16. The method of processing a transceiver signal of claim 15 , further including:

conducting only the current of an adjustable current source through the plurality of switches.

17. The method of processing a transceiver signal of claim 16 , further including the adjustable current canceling current induced by the echo signal, thereby improving linearity of the amplifier.

18. The method of processing a transceiver signal of claim 16 , further comprising determining the echo signal from a transmitted signal, and connecting a replica of the transmitted signal to an echo cancellation DAC, wherein the echo cancellation DAC generates the adjustable current.

19. The method of processing a transceiver signal of claim 16 , further comprising adaptively determining the echo signal from a transmitted signal, and reflections of the transmitted signal, and an echo cancellation DAC generating the adjustable current as controlled by an adaptive DSP controller.

20. An Ethernet receiver comprising:

a pre-sampling device;

a sampler receiving an output of the pre-sampling device;

a bank of ADCs receiving an output of the sampler;

digital processing circuitry generating received signal information based upon an output of the bank of ADCs;

the pre-sampling device comprising;

a single amplifier having a virtual ground node;

a feed back circuit from an output of the amplifier to the virtual ground node, the feed back circuit comprising;

a plurality of switches connected to the virtual ground node, the switches setting a plurality of programmable gain settings;

an adjustable current source, a current of the adjustable current source being summed at the virtual ground node, the adjustable current source being adjusted according to an estimated echo signal;

a low pass filter tuned to suppress received signal frequencies above a fraction of a sampling frequency of a sampler connected to the pre-sampling device.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2020
From: CAVIUM INTERNATIONAL
To: MARVELL ASIA PTE, LTD.
Reel/Frame 053179/0320 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 17, 2020
From: AQUANTIA CORPORATION
To: CAVIUM INTERNATIONAL
Reel/Frame 051945/0520 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED ON REEL 016679 FRAME 0063. ASSIGNOR(S) HEREBY CONFIRMS THE CHANGE OF ASSIGNEE FROM "TERANETICS INCORPORATED" TO READ "TERANETICS, INC." AS INDICATED IN THE EXECUTED ASSIGNMENT.. Recorded Jan 17, 2013
From: GUPTA, SANDEEP KUMAR
To: TERANETICS, INC.
Reel/Frame 029660/0300 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 21, 2012
From: PLX TECHNOLOGY, INC.; TERANETICS, INC.
To: AQUANTIA CORPORATION
Reel/Frame 029006/0838 →