Reed-solomon coding for 40GBASE-T ethernet
View Patent ↗A BASE-T Ethernet transceiver is disclosed. The transceiver includes a BASE-T Ethernet transmit circuit that employs a data framing module. The data framing module includes an input interface to receive Ethernet block data bits, and logic to aggregate the Ethernet block data bits in accordance with a 512/513B code. A forward error correction encoder is coupled to the logic to encode at least a first portion of the data bits to generate first error check bits. A Reed-Solomon (RS) encoder is coupled to the logic to encode at least a second portion of the data bits in accordance with a Reed-Solomon error code to generate second error check bits.
1. A BASE-T Ethernet transceiver comprising:
a BASE-T Ethernet transmit circuit including
a BASE-T Ethernet data framing module including
an input interface to receive Ethernet block data bits,
logic to aggregate the Ethernet block data bits in accordance with a 512/513B code,
a forward error correction encoder coupled to the logic to encode at least a first portion of the data bits to generate first error check bits, and
a Reed-Solomon (RS) encoder coupled to the logic to encode at least a second portion of the data bits in accordance with a Reed-Solomon error code to generate second error check bits.
2. The BASE-T Ethernet transceiver of claim 1 , wherein the Reed-Solomon error code comprises an RS256 (198, 192) error code.
3. The BASE-T Ethernet transceiver of claim 2 , wherein the logic associates the Ethernet block data bits with an auxiliary bit, the first error check bits, and the Reed-Solomon check bit.
4. The BASE-T Ethernet transceiver of claim 1 , wherein the forward error correction encoder comprises a Low Density Parity Check (LDPC) encoder.
5. The BASE-T Ethernet transceiver of claim 1 , further comprising:
a symbol mapper to receive the first error encoded transport frame and to modulate the first error encoded transport frame into symbols, each of the symbols having uncoded bits; and
a BASE-T transmitter coupled to the symbol mapper to transmit the first group of symbols over an Ethernet link at a given symbol rate; and
wherein errors in the uncoded bits for a predetermined number of the symbols are correctable via the Reed-Solomon check bits.
6. The BASE-T Ethernet transceiver of claim 5 , wherein the predetermined number of symbols that are correctable comprises three.
7. The BASE-T Ethernet transceiver of claim 5 , wherein the symbol mapper includes a PAM-16 encoder.
8. The BASE-T Ethernet transceiver of claim 7 , wherein the symbol mapper transforms the transport frame into back-to-back PAM-16 modulated symbols.
9. The BASE-T Ethernet transceiver of claim 5 , wherein the symbol mapper generates 512 symbols for the transport frame.
10. The BASE-T Ethernet transceiver of claim 5 , wherein the symbol mapper modulates the transport frame in accordance with a 128DSQ modulation.
11. A method of transferring Ethernet data, the method comprising:
framing BASE-T Ethernet data including
receiving Ethernet block data bits,
aggregating the Ethernet block data bits in accordance with a 512/513B code,
encoding at least a first portion of the data bits with a forward error correction encoder to generate first error check bits, and
encoding at least a second portion of the data bits with a Reed-Solomon (RS) encoder to generate second error check bits.
12. The method of claim 11 , wherein encoding at least a second portion of the data bits with an RS encoder is carried out in accordance with an RS256 (198, 192) error code.
13. The method of claim 11 , further comprising:
mapping the error encoded transport frame into symbols, each of the symbols having uncoded bits;
transmitting the symbols as first Ethernet data over a BASE-T Ethernet link at a given symbol rate; and
correcting errors in the uncoded bits for a predetermined number of the symbols via the Reed-Solomon check bits.
14. The method of claim 11 , wherein the encoding at least a first portion of the data bits is carried out with a Low Density Parity Check (LDPC) encoder.
15. The method of claim 13 , wherein the mapping further comprises modulating the transport frame in accordance with a 128DSQ modulation.
16. The method of claim 13 , wherein the mapping comprises encoding the data transport frame into plural PAM-16 symbols.
17. The method of claim 16 , wherein the plural PAM-16 symbols comprises plural back-to-back PAM-16 symbols.
18. The method of claim 16 , wherein the plural PAM-16 symbols comprises 512 symbols.
19. A BASE-T Ethernet data framing module comprising:
an input interface to receive Ethernet block data bits;
logic to aggregate the Ethernet block data bits in accordance with a 512/513B code,
a forward error correction encoder coupled to the logic to encode at least a first portion of the data bits to generate first error check bits, and
a Reed-Solomon (RS) encoder coupled to the logic to encode at least a second portion of the data bits in accordance with a Reed-Solomon error code to generate second error check bits.
20. The BASE-T Ethernet data framing module of claim 19 , wherein:
the Reed-Solomon error code comprises an RS256 (198, 192) error code; and
the 512/513B code includes control information sub-coded via a Trowbridge code.