IP Library Granted Patent US 7,202,560
Granted Patent B2
US 7,202,560 · App. 11/012,589 · Granted Apr 10, 2007

Wafer bonding of micro-electro mechanical systems to active circuitry

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Quick Facts
Patent No.
US 7,202,560
App. No.
11/012,589
Granted
Apr 10, 2007
Kind
B2
Abstract

A single integrated wafer package includes a micro electromechanical system (MEMS) wafer, an active device wafer, and a seal ring. The MEMS wafer has a first surface and includes at least one MEMS component on its first surface. The active device wafer has a first surface and includes an active device circuit on its first surface. The seal ring is adjacent the first surface of the MEMS wafer such that a seal is formed about the MEMS component. An external contact is provided on the wafer package. The external contact is accessible externally to the wafer package and is electrically coupled to the active device circuit of the active device wafer.

Claims (23)

1. A single integrated wafer package comprising:

a micro electromechanical system (MEMS) wafer with a first surface, the MEMS wafer having at least one MEMS component on its first surface:

an active device wafer with a first surface, the active device wafer having an active device circuit on its first surface and configured to be spaced apart from the MEMS wafer such that the first surface of the MEMS wafer faces the first surface of the active device wafer;

a seal ring adjacent the first surface of the MEMS wafer such that a seal is formed about the MEMS component by at least the combination of the seal ring and the first surface of the MEMS wafer; and

an external contact to the single integrated wafer package, wherein the external contact accessible externally to the single integrated wafer package and is electrically coupled to the active device circuit of the active device wafer.

2. The single integrated wafer package of claim 1 , wherein the seal formed about the MEMS component comprises a hermetic seal.

3. The single integrated wafer package of claim 1 , wherein the MEMS component is one of a group comprising a thin film acoustic resonator (FBAR) and a solidly mounted acoustic resonator (SMR).

4. The single integrated wafer package of claim 1 , wherein the seal ring is also adjacent the first surface the active device wafer such that the seal is formed by the combination of the seal ring, the first surface the active device wafer, and first surface the MEMS wafer.

5. The single integrated wafer package of claim 4 , wherein the formed seal is a hermetic seal.

6. The single integrated wafer package of claim 4 , wherein the seal ring between the MEMS wafer and the active device wafer is a copper pillar ring surrounding the MEMS component and that couples the wafers together such that they form a single integrated component.

7. The single integrated wafer package of claim 1 , wherein the MEMS wafer further includes at least one via through which an electrical connection is made between the external contact and at least one of the group comprising the active device circuit and the MEMS component.

8. The single integrated wafer package of claim 1 , wherein the active device wafer further includes at least one via through which an electrical connection is made between the external contact and at least one of the group comprising the active device circuit and the MEMS component.

9. The single integrated wafer package of claim 7 , wherein at least one column is formed between the MEMS wafer and the active device wafer, the column aligned with the via such that the column facilitates the electrical connection between the active device circuit and the external contact.

10. The single integrated wafer package of claim 8 , wherein at least one column is formed between the MEMS wafer and the active device wafer, the column aligned with the via such that the column facilitates the electrical connection between the MEMS wafer and the external contact.

11. A single integrated wafer package comprising:

a micro electromechanical system (MEMS) wafer with a first surface, the MEMS wafer having at least one MEMS component on its first surface;

an active device wafer with a first surface, the active device wafer having an active device circuit on its fist surface;

a seal ring adjacent the first surface of the MEMS wafer such that a seal is formed about the MEMS component;

an external contact to the single integrated wafer package, wherein the external contact accessible externally to the single integrated wafer package and is electrically coupled to the active device circuit of the active device wafer; and

a microcap wafer coupled between the MEMS wafer and the active device wafer, and wherein the seal ring is sandwiched between the MEMS wafer and the microcap wafer thereby providing the seal about the MEMS component.

12. The single integrated wafer package of claim 11 , wherein the seal formed about the MEMS component comprise a hermetic seal.

13. The single integrated wafer package of claim 11 wherein the MEMS wafer further includes at least one via through which an electrical connection is made between the external contact and at least one of the group comprising the active device circuit and the MEMS component.

14. The single integrated wafer package of claim 11 wherein the active device wafer further includes at least one via through which an electrical connection is made between the external contact and at least one of the group comprising the active device circuit and the MEMS component.

Assignments (13)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 017206 FRAME: 0666. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 6, 2016
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 038632/0662 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →
RELEASE OF SECURITY INTEREST Recorded May 15, 2013
From: CITICORP NORTH AMERICA, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 030422/0001 →
MERGER Recorded May 7, 2013
From: AVAGO TECHNOLOGIES WIRELESS IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 25, 2006
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD
To: AVAGO TECHNOLOGIES WIRELESS IP (SINGAPORE) PTE. LTD.
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SECURITY AGREEMENT Recorded Feb 24, 2006
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: CITICORP NORTH AMERICA, INC.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 22, 2006
From: AGILENT TECHNOLOGIES, INC.
To: AVAGO TECHNOLOGIES GENERAL IP PTE. LTD.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 29, 2005
From: DUGAN, THOMAS E.; FAZZIO, RONALD S.
To: AGILENT TECHNOLOGIES, INC.
Reel/Frame 016005/0485 →