IP Library Granted Patent US 7,129,100
Granted Patent B2
US 7,129,100 · App. 11/014,407 · Granted Oct 31, 2006

In-wafer testing of integrated optical components in photonic integrated circuits (PICs)

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Quick Facts
Patent No.
US 7,129,100
App. No.
11/014,407
Granted
Oct 31, 2006
Kind
B2
Abstract

Disclosed is a method of in-wafer testing of integrated optical components and in-wafer chips with photonic integrated circuits (PICs).

Claims (12)

1. A method of in-wafer testing of a photonic integrated circuit (PIC) which includes a plurality of modulated sources each having a different operational wavelength on a predetermined wavelength grid and an optical combiner having a predetermined wavelength grid and passband to combine the wavelength outputs from the modulated sources, comprising the steps of:

providing a plurality of vernier outputs from the optical combiner at a zero order Brillouin zone of the optical combiner,

providing a higher order Brillouin zone output from the optical combiner on adjacent sides of the zero order Brillouin zone;

detecting the output from at least one of the higher order Brillouin zone outputs to determine if there is an offset between of the modulated source wavelength grid and the passband of the optical combiner.

2. The method of claim 1 wherein the step of detecting is carried out by photodetectors integrated with the PIC and coupled to receive the higher order Brillouin zone outputs from the optical combiner.

3. The method of claim 2 further comprising the steps of:

singulating the wafer into a plurality of photonic integrated circuit chips; and

removing the photodetectors from the chip.

4. The method of claim 3 wherein the step of removing comprises the step of cleaving the photodetectors from the chip.

5. The method of claim 3 wherein the step of removing comprises the step of cleaving away an adjacent PIC chip containing a detector array for its neighboring PIC chip.

6. The method of claim 1 wherein the steps of detecting are performed on a photonic integrated circuit chip after singulating the wafer into a plurality of photonic integrated circuit chips.

7. The method of claim 6 comprising the further step of cleaving the photodetectors from the chip after the completion of testing.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Jan 14, 2008
From: UNITED COMMERCIAL BANK
To: INFINERA CORPORATION
Reel/Frame 020353/0641 →
INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jun 27, 2005
From: INFINERA CORPORATION
To: UNITED COMMERCIAL BANK
Reel/Frame 016182/0575 →