In-wafer testing of integrated optical components in photonic integrated circuits (PICs)

1. A method of in-wafer testing of a photonic integrated circuit (PIC) which includes a plurality of modulated sources each having a different operational wavelength on a predetermined wavelength grid and an optical combiner having a predetermined wavelength grid and passband to combine the wavelength outputs from the modulated sources and provide a combined signal, comprising the steps of:

providing a plurality of vernier outputs from the optical combiner;

providing an array of photodetectors, each to detect the combined signal from each of the vernier outputs to provide an electrical detection signal input; and

determining from the detection signal inputs which of the photodetector provides for an optimum vernier output of the combined signal.

2. The method of claim 1 comprising the step of integrating the signal inputs from the photodetector array for determining wavelength grid of the modulated sources.

3. The method of claim 1 comprising the step of integrating the signal inputs from the photodetector array for determining the wavelength grid and passband of the optical combiner.

4. The method of claim 1 comprising the steps of:

integrating the signal inputs from the photodetector array for determining a degree of matching between of the modulated source wavelength grid to the wavelength grid passband of the optical combiner; and

determining which of several of the photodetectors contains a photodetector having an optimum vernier output.

5. The method of claim 1 further comprising the steps of:

singulating the wafer into a plurality of photonic integrated circuit chips; and

removing the array of photodetectors from the chip.

6. The method of claim 5 wherein the step of removing comprises the step of cleaving the array of photodetectors from the chip.

7. The method of claim 5 wherein the step of removing comprises the step of cleaving away an adjacent PIC chip containing a detector array for its neighboring PIC chip.

8. The method of claim 1 wherein the steps of detecting are performed on a photonic integrated circuit chip after singulating the wafer into a plurality of photonic integrated circuit chips.

9. The method of claim 8 wherein the step of removing comprises the step of cleaving the array of photodetectors from the chip after the completion of testing.

10. The method of claim 1 wherein said modulated sources include an array of DFB laser sources or an array of DBR laser sources.

11. The method of claim 1 wherein said optical combiner is a wavelength selective combiner.

12. The method of claim 11 wherein said wavelength selective combiner is an arrayed waveguide grating (AWG), an Echelle grating or cascaded Mach-Zehnder interferometers.

13. The method of claim 1 wherein said optical combiner is a non-wavelength selective combiner.

14. The method of claim 13 wherein said non-wavelength selective combiner is a power coupler, a star coupler or a multimode interference combiner (MMI) coupler.

15. The method of claim 1 wherein said PIC is an optical transmitter photonic integrated circuit (TxPIC).

16. A method of detecting an optimum vernier output from an optical transmitter photonic integrated circuit (TxPIC) including an array of modulated sources and a wavelength selective optical combiner having a plurality of vernier outputs comprising the steps of:

providing a photodetector in the PIC at the output end of each vernier output;

combining the outputs of the photodetectors to form an integrating detector;

measuring the power from the integrating detector to determine which subgroup in the total group of photodetectors contains a vernier output with an optimum vernier output from the PIC; and

measuring the power from each vernier output in the subgroup of photodetectors to identity which subgroup vernier output is an optimum vernier output.