Device isolation method of semiconductor memory device and flash memory device fabricating method using the same
View Patent ↗The present invention provides a device isolation method of a semiconductor memory device and flash memory device fabricating method using the same, which can prevent a bridge occurrence between cells. The present invention includes forming a nitride layer pattern defining a trench forming area on a semiconductor substrate, forming a spacer on a sidewall of the nitride layer pattern, forming a trench in the semiconductor layer by removing a portion of the semiconductor layer using the nitride layer pattern and the spacer as an etch mask, forming a device isolation layer filling up the trench, removing the nitride layer pattern and the spacer to complete the device isolation layer, forming a conductor layer over the substrate including the device isolation layer, planarizing the conductor layer and the device isolation layer to lie in a same plane, and forming an insulating layer over the substrate.
1. A method of fabricating a flash memory device, comprising the steps of:
forming a nitride layer pattern defining a trench forming area on a semiconductor substrate;
forming a spacer on a sidewall of the nitride layer pattern;
forming a trench in the semiconductor substrate by removing a portion of the semiconductor substrate using the nitride layer pattern and the spacer as an etch mask;
forming a device isolation layer filling up the trench;
removing the nitride layer pattern and the spacer so that a portion of the device isolation layer above the semiconductor substrate has a negative profile;
forming a conductor layer over the semiconductor substrate including the device isolation layer;
planarizing the conductor layer and the device isolation layer to lie in a same plane; and removing the device isolation layer embedded in the planarized conductor layer; forming an insulating layer over the semiconductor substrate.
2. The method of claim 1 , wherein the spacer is formed of nitride.
3. The method of claim 1 , wherein the nitride layer pattern is formed to be about 1,500˜4,500 Å thick.
4. The method of claim 1 , wherein the planarizing step is carried out by chemical mechanical polishing.