IP Library Granted Patent US 7,217,632
Granted Patent B2
US 7,217,632 · App. 11/021,032 · Granted May 15, 2007

Isolation methods in semiconductor devices

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Quick Facts
Patent No.
US 7,217,632
App. No.
11/021,032
Granted
May 15, 2007
Kind
B2
Abstract

Methods of forming a device isolation layer in a semiconductor substrate are disclosed. A disclosed method includes: forming a trench in a field area of a semiconductor substrate, growing a SiON layer on an inside of the trench by annealing in an ambience of NO gas, and filling the trench with a trench-fill material.

Claims (5)

1. An isolation method comprising:

forming a trench in a semiconductor substrate;

growing a SiON layer on an inside of the trench by annealing in an ambience of NO gas performing heavy nitrogen ion implantation on the SiON layer; and

filling the trench with a trench-fill material.

2. An isolation method as defined in claim 1 , wherein the annealing is performed for about 5˜30 minutes at a temperature of about 850˜950° C. in the ambience of the NO gas diluted to about 9.5:1˜8.2 l/min.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2014
From: DONGBU HITEK CO., LTD.
To: DSS TECHNOLOGY MANAGEMENT, INC.
Reel/Frame 033035/0680 →