IP Library Granted Patent US 7,166,489
Granted Patent B2
US 7,166,489 · App. 11/022,647 · Granted Jan 23, 2007

Complementary metal oxide semiconductor image sensor and method for fabricating the same

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Quick Facts
Patent No.
US 7,166,489
App. No.
11/022,647
Granted
Jan 23, 2007
Kind
B2
Abstract

A CMOS image sensor and a method for fabricating the same is disclosed, to enhance the image-sensing efficiency by forming a concave lens area for improving the light-condensing efficiency in a planarization layer formed before a micro-lens array, in which the CMOS image sensor includes a plurality of photosensitive devices on a semiconductor substrate; an insulating interlayer on the plurality of photosensitive devices; a plurality of color filter layers in correspondence with the respective photosensitive devices, to filter the light by respective wavelengths; a planarization layer on the color filter layers, and having first micro-lens by intaglio in correspondence with the respective photosensitive patterns to condense the light secondly; and a plurality of second micro-lens layers on the planarization layer in correspondence with the respective photosensitive devices, to condense the light firstly.

Claims (7)

1. A method for fabricating a CMOS image sensor comprising:

forming an insulating interlayer on a semiconductor substrate having a plurality of photosensitive devices;

forming a protective layer on the insulating interlayer;

forming color filter layers in correspondence with the respective photosensitive devices;

forming a plurality of first micro-lenses provided densely to each of the photosensitive devices by forming a planarization layer on the color filter layers, and selectively patterning the planarization layer; and

forming a plurality of second micro-lens layers by depositing a material layer on the first micro-lenses, and performing patterning and reflowing processes thereon.

2. The method of claim 1 , wherein forming the plurality of first micro-lenses includes selectively patterning the planarization layer using a mask layer having a plurality of open areas, each open area having a diameter between 0.3 μm and 0.4 μm.

Assignments (2)
CHANGE OF NAME Recorded Jul 13, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 018099/0281 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2004
From: KIM, SHANG WON
To: DONGBUANAM SEMICONDUCTOR INC.
Reel/Frame 016134/0543 →