Method of fabricating a fin field effect transistor
View Patent ↗A method of fabricating a fin field effect transistor is disclosed. An example method forms a thermal oxide layer as a hard mask for etching a silicon fin on an SOI substrate, transcribes a fin pattern, forms a fin FET body by etching using the fin pattern as an etch mask, and restores a sidewall damaged by the etching remove a sacrificial silicon oxide layer. The example method also deposits a high-K dielectric as a gate dielectric, deposits a metal layer, planarizes the metal layer to a height of a hard oxide, forms a nitride layer on the planarized metal layer, and patterns the nitride layer using a hard mask for forming a pattern to form a nitride layer pattern. Additionally, the example method forms a metal gate using the nitride layer pattern, removes a remaining hard oxide mask, and grows a sidewall oxide layer on the metal gate.
1. A method of fabricating a fin field effect transistor, comprising:
forming a thermal oxide layer as a hard mask for etching a silicon fin on an SOI substrate;
transcribing a fin pattern;
forming a fin FET body by etching using the fin pattern as an etch mask;
growing a sacrificial silicon oxide layer to restore a sidewall damaged by the etching;
removing the sacrificial silicon oxide layer;
depositing a high-K dielectric as a gate dielectric;
depositing a metal layer;
planarizing the metal layer to a height of a hard oxide;
forming a nitride layer on the planarized metal layer;
patterning the nitride layer using a hard oxide mask for forming a pattern to form a nitride layer pattern;
forming a metal gate using the nitride layer pattern;
removing a remaining hard oxide mask using high frequency; and
growing a sidewall oxide layer on the metal gate.
2. The method of claim 1 , wherein one selected from the group consisting of HfO 2 , Ta 2 O 5 , and ZrO 2 is used as a raw material of the high-K dielectric.
3. The method of claim 1 , wherein the metal gate is formed of one selected from Ru—Ta, TaN, and Mo based metals.