Method of fabricating semiconductor device using selective epitaxial growth
View Patent ↗A method of fabricating a semiconductor device uses selective epitaxial growth (SEG), by which leakage current generation is minimized using lateral SEG growth in case a contact intrudes a shallow track isolation feature. The method includes steps of forming a sidewall spacer on a gate, selectively growing an epitaxial layer in a lateral direction relative to the sidewall spacer and the gate, and forming a contact on the epitaxial layer.
1. A method of fabricating a semiconductor device, comprising steps of:
forming a shallow trench isolation layer;
forming a sidewall spacer on a sidewall of a gate;
forming at least one of a source and a drain under the sidewall;
selectively growing an epitaxial layer in a lateral direction relative to the sidewall spacer and the gate, wherein the epitaxial layer is distinct from the shallow trench isolation layer;
and forming a contact on the epitaxial layer,
wherein said step of selectively growing is performed after said forming a sidewall step, and wherein no portion of the contact comes into direct contact with a boundary between the shallow trench isolation layer and the at least one of a source and a drain.
2. The method of claim 1 , wherein the least one of a source and a drain is formed under the sidewall spacer after the forming a sidewall step.
3. The method of claim 1 , wherein the at least one of a source and a drain is formed under the sidewall spacer after the selectively growing step.
4. The method of claim 1 , wherein the epitaxial layer is grown by low pressure chemical vapor deposition at a temperature in an inclusive range of 700° C. through 950° C. using Si 2 H 2 Cl 2 or SiH 4 as a base material with HCl and diluted H 2 gas.
5. The method of claim 1 , wherein the epitaxial layer is grown by low pressure chemical vapor deposition at a temperature in an inclusive range of 600° C. through 750° C. using Si 2 H 6 or Cl 2 as a base material with HCl and diluted H 2 gas.
6. The Method of claim 1 , further comprising the step of performing silicidation after the selectively growing step.
7. A method of fabricating a semiconductor device, comprising steps of:
forming a sidewall spacer on a sidewall of a gate;
selectively growing an epitaxial layer in a lateral direction relative to the sidewall spacer and the gate;
and forming a contact on the epitaxial layer,
wherein said step of selectively growing is performed after said forming a sidewall step and,
wherein no portion of the contact comes into direct contact with a boundary between the shallow trench isolation layer and the at least one of a source and a drain.
8. The method of claim 7 , further comprising a step of forming at least one of a source and a drain under the sidewall spacer after forming a sidewall step.
9. The method of claim 7 , further comprising a step of forming at least one of a source and a drain under the sidewall spacer after the selectively growing step.
10. The method of claim 7 , wherein the epitaxial layer is grown by low pressure chemical vapor deposition at a temperature in an inclusive range of 700° C. through 950° C. using Si 2 H 2 Cl 2 or SiH 4 as a base material with HCl and diluted H 2 gas.
11. The method of claim 7 , wherein the epitaxial layer is grown by low pressure chemical vapor deposition at a temperature in an inclusive range of 600° C. through 750° C. using Si 2 H 6 or Cl 2 as a base material with HCl and diluted H 2 gas.
12. The method of claim 7 , further comprising the step of performing silicidation after the selectively growing step.