Method of forming contact hole
View Patent ↗A method of forming a contact hole in a semiconductor device, by which a PMD layer as an insulating interlayer is prevented from being overetched by wet cleaning for removing polymer and photoresist after forming a contact hole perforating the PMD layer in a manner of adjusting temperature and concentration of an NC-2 solution for the wet cleaning. The present invention includes the steps of forming a premetal dielectric layer on a semiconductor substrate, forming a contact hole perforating the premetal dielectric layer, and cleaning the substrate using an NC-2 cleaning solution at a temperature equal to or lower than about 55° C.
1. A method of forming a contact hole, comprising the steps of:
forming a premetal dielectric layer on a semiconductor substrate;
forming a contact hole perforating the premetal dielectric layer; and
cleaning the substrate using an NC-2 cleaning solution at a temperature equal to or lower than about 55° C.
2. The method of claim 1 , further comprising the step of forming a premetal dielectric liner layer beneath the premetal dielectric layer.
3. The method of claim 2 , wherein the premetal liner layer is formed of PETEOS.
4. The method of claim 2 , wherein the premetal liner layer is formed of SiN.
5. The method of claim 1 , further comprising the step of forming a PETEOS layer on the premetal dielectric layer.
6. The method of claim 1 , further comprising the step of cleaning the substrate using an SH cleaning solution prior to the NC-2 cleaning solution cleaning step.
7. The method of claim 1 , wherein the premetal dielectric layer is selected from the group consisting of BPSG, BSG, and PSG layers.
8. The method of claim 1 , wherein a volume ratio of the NC-2 cleaning solution is set as TMH:H 2 O 2 :H 2 O=1:2.3˜10:30˜40.
9. The method of claim 1 , wherein a semiconductor device including a gate electrode and source/drain is formed on the semiconductor substrate.
10. A method for forming a contact hole, comprising:
step for forming a premetal dielectric layer on a semiconductor substrate;
step for forming a contact hole perforating the premetal dielectric layer; and
step for cleaning the substrate using an NC-2 cleaning solution at a temperature equal to or lower than about 55° C.
11. The method of claim 10 , further comprising step for forming a premetal dielectric liner layer beneath the premetal dielectric layer.
12. The method of claim 11 , wherein the premetal liner layer is formed of PETEOS.
13. The method of claim 11 , wherein the premetal liner layer is formed of SiN.
14. The method of claim 10 , further comprising step for forming a PETEOS layer on the premetal dielectric layer.
15. The method of claim 10 , further comprising step for cleaning the substrate using an SH cleaning solution prior to the step for cleaning the substrate using an NC-2cleaning solution.
16. The method of claim 10 , wherein the premetal dielectric layer is selected from the group consisting of BPSG, BSG, and PSG layers.
17. The method of claim 10 , wherein a volume ratio of the NC-2 cleaning solution is set as TMH:H 2 O 2 :H 2 O=1:2.3˜10:30˜40.
18. The method of claim 10 , wherein a semiconductor device including a gate electrode and source/drain is formed on the semiconductor substrate.