IP Library Granted Patent US 8,092,986
Granted Patent B2
US 8,092,986 · App. 11/025,123 · Granted Jan 10, 2012

Exposure methods

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Quick Facts
Patent No.
US 8,092,986
App. No.
11/025,123
Granted
Jan 10, 2012
Kind
B2
Abstract

The present disclosure provides an exposure method for a semiconductor device, in which whether a specific pattern corresponds to a sparse area or a dense area is decided to employ a specific phase-shift mask and by which critical dimension uniformity and resolution of the pattern are enhanced. One example method includes defining a hole area for a plurality of holes into a dense area and a sparse area, coating a photoresist layer on a substrate having a plurality of elements formed thereon, carrying out a first exposure on the photoresist layer using a first photomask having patterns corresponding to the dense and sparse areas, respectively, and carrying out a second exposure on the photoresist layer using a second photomask having at least two halftone layers provided to portions corresponding to the dense and sparse areas, respectively wherein the at least two halftone layers differ from each other in transmitivity, respectively.

Claims (24)

1. An exposure method comprising:

defining a hole area for a plurality of holes into a dense area and a sparse area;

coating a photoresist layer on a substrate having a plurality of elements formed thereon;

carrying out a first exposure on the photoresist layer using a first photomask having patterns corresponding to the dense and sparse areas, respectively; and

carrying out a second exposure on the photoresist layer using a second photomask comprising a first halftone layer having a first transmissivity in the dense area and a second halftone layer having a second transmissivity in the sparse area.

2. An exposure method as defined by claim 1 , wherein a diameter or one side length of each of the plurality of holes is ‘L’, a distance between the elements on the substrate is ‘F’, a shortest distance between neighbor holes is ‘E’, and a distance between each hole and a nearest element is ‘D 1 , D 2 , D 3 , or D 4 ’ according to a vertical or horizontal direction, wherein each of the holes belonging to the sparse area meets the following conditions: F≧4L; E ≧2L; and L is greater than at least three of the distances D 1 , D 2 , D 3 , and D 4 , and holes that fail to meet the conditions belong to the dense area.

3. An exposure method as defined by claim 1 , wherein the first transmissivity is less than the second transmissivity.

4. The method of claim 3 , wherein the second halftone layer has a transmissivity of 95% and the first halftone layer has a transmissivity of 90%.

5. An exposure method as defined by claim 1 , wherein a plurality of the elements are gates or metal lines.

6. The method of claim 1 , wherein a diameter of the holes in the dense area is equal to a diameter of the holes in the sparse area.

7. The method of claim 1 , wherein a geometric area of an exposed photoresist corresponding to the sparse area is smaller than a geometric area of an exposed photoresist corresponding to the dense area.

8. The method of claim 1 , wherein the first photomask comprises a glass substrate and a shield layer.

9. The method of claim 8 , wherein the second photomask comprises a halftone phase shift mask.

10. The method of claim 1 , wherein the second photomask comprises a halftone phase shift mask.

11. The method of claim 1 , wherein the holes in the dense area and the holes in the sparse area are uniform in size.

12. The method of claim 1 , further comprising developing the photoresist layer.

13. The method of claim 1 , further comprising forming the plurality of holes.

14. The method of claim 1 , wherein the elements comprise gates or metal lines.

15. The method of claim 14 , wherein each of the plurality of holes exposes gates or metal lines.

16. The method of claim 1 , wherein each of the plurality of holes exposes gates or metal lines.

17. The method of claim 1 , further comprising forming an insulating layer over the substrate.

18. The method of claim 17 , further comprising etching the insulating layer.

19. The method of claim 18 , wherein etching the insulating layer comprises using the exposed photoresist layer as an etch mask.

20. The method of claim 18 , wherein etching the insulating layer forms a plurality of contact holes equal to each other in diameter.

Assignments (3)
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNOR PREVIOUSLY RECORDED ON REEL 017654 FRAME 0078. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNOR SHOULD BE "DONGBUANAM SEMICONDUCTOR INC.". Recorded Jun 22, 2006
From: DONGBUANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017829/0911 →
CHANGE OF NAME Recorded May 22, 2006
From: DONGANAM SEMICONDUCTOR INC.
To: DONGBU ELECTRONICS CO., LTD.
Reel/Frame 017654/0078 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 28, 2004
From: LEE, JUN SEOK
To: DONGBUANAM SEMICONDUCTOR, INC.
Reel/Frame 016139/0398 →