Method for fabricating metal wirings of semiconductor device
View Patent ↗A method for fabricating metal wirings of a semiconductor including forming an etch stop layer on a semiconductor substrate, and forming an inter metal dielectric on the etch stop layer. The method also includes forming a via hole in the inter metal dielectric so as to expose the etch stop layer, and forming a trench on the inter metal dielectric so as to expose the via hole. The method further includes removing the etch stop layer exposed through the via hole, wet etching an inner wall of the trench, and forming a metal wiring inside the via hole and the trench.
1. A method for fabricating metal wirings of a semiconductor, comprising:
forming an etch stop layer on a semiconductor substrate;
forming an inter metal dielectric on the etch stop layer;
forming a via hole in the inter metal dielectric so as to expose the etch stop layer;
forming a trench on the inter metal dielectric so as to expose the via hole;
removing the etch stop layer exposed through the via hole;
removing any striations formed on an inner wall of the trench;
thermally treating the semiconductor substrate in an environment of heavy hydrogen at a temperature in the range of 200 to 300 degrees Celsius for 10 to 30 seconds after the removing of any striations so as to remove polymer particles existing in the inner walls of the trench; and
forming a metal wiring filled inside the via hole and the trench;
wherein removing any striations includes wet etching in an etchant made by mixing alkalic solution, H2O2, and distilled water in a ratio of 1:4:4 to 20, at a temperature in a range of about 30 to about 45 degrees Celsius.
2. The method of claim 1 , wherein the alkalic solution is ammonium or TMAH.
3. The method of claim 1 , wherein the step of removing any striations includes wet etching until a depth of the inter metal dielectric removed is between about 10 to about 20 Å.
4. The method of claim 1 , wherein the semiconductor substrate includes a low metal wiring and the metal wiring is connected to the low metal wiring through the via hole and the trench.
5. A method for fabricating metal wirings of a semiconductor, compnsing:
a step for forming an etch stop layer on a semiconductor substrate;
a step for forming an inter metal dielectric on the etch stop layer;
a step for forming a via hole in the inter metal dielectric so as to expose the etch stop layer;
a step for forming a trench on the inter metal dielectric so as to expose the via hole;
a step for removing the etch stop layer exposed through the via hole;
a step for removing any striations formed on an inner wall of the trench;
a step for thermally treating the substrate in an environment of heavy hydrogen at a temperature in a range of 200 to 300 degrees Celsius for 10 to 30 seconds after the step for removing striations formed on the inner wall of the trench so as to remove polymer particles existing in the inner wall of the trench; and
a step for forming a metal wiring filled inside the via hole and the trench;
wherein removing any striations includes wet etching in an etchant made by mixing alkalic solution, H2O2, and distilled water in a ratio of 1:4:4 to 20, at a temperature in a range of about 30 to about 45 degrees Celsius.
6. The method of claim 5 , wherein the alkalic solution is ammonium or TMAH.
7. The method of claim 5 , wherein the step for removing any striations includes a step for wet etching until a depth of the inter metal dielectric removed is between about 10 to about 20 Å.
8. The method of claim 5 , wherein the semiconductor substrate includes a low metal wiring and the metal wiring is connected to the low metal wiring through the via hole and the trench.
9. The method of claim 1 , wherein the step of removing any striations includes wet etching.
10. The method of claim 5 , wherein the step for removing any striations includes a step for wet etching.