Ballout for buffer
View Patent ↗In some embodiments, a multichip package includes mounting pads to mount devices, such as integrated circuits, to a substrate, such as a printed circuit board, so that devices mutually placed on opposite surfaces of the substrate do not have interfering connections or connection vias. Other embodiments are described.
1. An apparatus comprising:
a substrate having a front and a back, and having a window area on the front; interconnects and no-connects within the window area;
at least one front mounting pad to receive a front device having interconnects on the front, and at least one back mounting pad to receive a back device having interconnects on the back, wherein the front mounting pad is disposed opposite the back mounting pad in an overlapping fashion, and wherein the interconnects on the front and the interconnects on the back are between the overlapping front and back mounting pads; and
one or more contiguous regions within the window area having no-connects that substantially align with interconnects of the at least one back mounting pad.
2. The apparatus of claim 1 wherein the at least one front mounting pad has interconnects within the window area.
3. The apparatus of claim 1 wherein each of the one or more contiguous regions has N×M no-connects, where N and M are each an integer.
4. The apparatus of claim 3 wherein N is any integer number in the range of 2-5, and M is any integer number in the range of 8-14.
5. The apparatus of claim 1 wherein the front device is mounted to overlap the back device.
6. An apparatus comprising:
a substrate having a front side and a back side, and having a first group of vias and a second group of vias;
a front mounting pad to receive a front device connected on the front side, and a back mounting pad to receive a back device connected on the back side, the front mounting pad corresponding to the first group of vias and the back mounting pad corresponding to the second group of vias; and
a window region and at least one window on the front side of the substrate, the window region containing the first group of vias, and the at least one window containing the second group of vias, the window region and the at least one window being exclusive of each other, wherein the entire window region is between the front mounting pad and the back mounting pad.
7. The apparatus of claim 6 wherein the at least one window is inside the window region.
8. The apparatus of claim 7 wherein the at least one window comprises interconnects and no-connects.
9. The apparatus of claim 7 wherein a region between a pair of the at least one window comprises interconnects, and the at least one window comprises no-connects.
10. The apparatus of claim 7 wherein the window region comprises interconnects, and the at least one window comprises no-connects.
11. The apparatus of claim 6 wherein the back device is one selected from the group consisting of: an integrated circuit, and a DRAM.
12. The apparatus of claim 6 wherein the front device is one selected from a group consisting of: an integrated circuit, and a buffer.
13. The apparatus of claim 6 wherein the substrate is one selected from the group consisting of: a multilayer substrate, a printed circuit board, an aluminum-based ceramic board, a plastic glass laminated substrate, a tape-based substrate, and a flexible printed circuit board.
14. The apparatus of claim 6 , wherein the substrate uses ball grid array mounting.
15. An apparatus comprising:
a substrate having a front and a back; and
a mounting pad on each of the front and the back, each mounting pad having connection vias, wherein the connection vias of the mounting pad on the front are in different locations on the substrate than the connection vias of the mounting pad on the back, and wherein the mounting pad on the front entirely overlaps the mounting pad on the back.
16. The apparatus of claim 15 , wherein the substrate is multilayer.
17. The apparatus of claim 15 , wherein the substrate is a printed circuit board.
18. A multichip package comprising:
a substrate having a front and a back;
at least one mounting pad on each of the front and the back, each mounting pad configured to mount an integrated circuit chip;
a window region on the front having at least one window, the at least one window located directly opposite a number of the at least one mounting pad on the back;
front vias in the window region exclusive of the at least one window, the front vias configured to connect to a chip mounted on the front; and
back vias in the at least one window exclusive of the window region, the back vias configured to connect to a chip mounted on the back, wherein the front vias and the back vias are between the chip mounted on the front and the chip mounted on the back.
19. The multichip package of claim 18 , wherein the substrate is multilayer.
20. The multichip package of claim 18 , wherein the substrate is a printed circuit board.
21. The multichip package of claim 18 , wherein the chip mounted on the back is a DRAM.
22. The multichip package of claim 18 , wherein the chip mounted on the front is a buffer.
23. The multichip package of claim 18 , wherein the substrate uses ball grid array mounting.