Methods of fabricating gate spacers for semiconductor devices
View Patent ↗A method of fabricating the gate spacers of semiconductor devices is disclosed. An example method forms a gate on a semiconductor substrate, deposits a buffer oxide layer and a nitride layer sequentially on the whole semiconductor substrate including the gate, and forms spacers by etching the nitride layer.
1. A method of fabricating the gate spacers of semiconductor devices comprising:
forming a gate on a semiconductor substrate;
depositing a buffer oxide layer and a nitride layer sequentially on the whole semiconductor substrate including the gate; and
forming spacers by etching the nitride layer using a high density plasma, wherein the high density plasma is made of gas mixtures of HBr/SF 6 /N 2 .
2. A method as defined by claim 1 , wherein the buffer oxide layer is made of LP-TEOS with a thickness between 150 Å and 300 Å.
3. A method as defined by claim 1 , wherein the nitride layer is made of SiN with a thickness between 700 Å and 1200 Å.
4. A method as defined by claim 1 , wherein the nitride layer is etched by SF 6 gas between 20 sccm and 100 sccm. HBr gas between 80 sccm and 200 sccm and N 2 gas between 0 sccm and 20 sccm. a source power between 500 W and 1000 W and a bias power between 50 W and 100 W.
5. A method as defined by claim 4 , wherein the amount of the N 2 gas and the source/bias power are adjusted depending on the etch selectivity between the nitride layer and the oxide layer.