IP Library Granted Patent US 7,005,348
Granted Patent B2
US 7,005,348 · App. 11/027,079 · Granted Feb 28, 2006

Methods for fabricating semiconductor devices

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Quick Facts
Patent No.
US 7,005,348
App. No.
11/027,079
Granted
Feb 28, 2006
Kind
B2
Abstract

Methods for fabricating semiconductor devices are disclosed. An illustrated method includes: etching a semiconductor substrate to form a trench, forming an ONO film on the semiconductor substrate, removing the ONO film from the upper surface of the semiconductor substrate while leaving the ONO film on an inside wall surface of the trench, forming a gate oxide film on the semiconductor substrate adjacent the ONO film, depositing polysilicon on the semiconductor substrate, and selectively removing the polysilicon to form SONOS gate electrodes on the gate oxide film and the trench, respectively. Because opposite sides of the polysilicon gate electrode are covered with an ONO layer, the size of the nitride film may be substantially maximized.

Claims (14)

1. A method for fabricating a semiconductor device comprising:

etching a semiconductor substrate to form a trench;

forming an ONO film on the semiconductor substrate and in the trench;

removing the ONO film from an upper surface of the semiconductor substrate while leaving the ONO film on an inside wall surface of the trench;

forming a gate oxide film on the semiconductor substrate adjacent the ONO film;

depositing polysilicon on the semiconductor substrate, the polysilicon filling the trench; and

selectively removing the polysilicon to form SONOS gate electrodes on the gate oxide film and the trench, respectively.

2. A method as claimed in claim 1 , wherein etching the semiconductor substrate to form the trench comprises forming the trench to a depth of about 5~100% of a height of the gate electrode.

3. A method as claimed in claim 1 , wherein the ONO layer on the inside wall surface of the trench has a height of about 5~100% of a height of the gate electrode.

4. A method as claimed in claim 1 , wherein selectively removing the polysilicon to form the SONOS gate electrodes comprises forming a BARC (Bottom Anti-Reflect Coating) film to a thickness of about 200~1300 Å on or beneath a photoresist film coated on the polysilicon.

5. A method as claimed in claim 1 , wherein the ONO film comprises:

a lower oxide film with a thickness of about 20~100 Å,

a trap nitride film with a thickness of about 30~200 Å, and

an upper oxide film with a thickness of about 50~200 Å.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2014
From: DONGBU HITEK CO., LTD.
To: DSS TECHNOLOGY MANAGEMENT, INC.
Reel/Frame 033035/0680 →