IP Library Granted Patent US 7,365,430
Granted Patent B2
US 7,365,430 · App. 11/027,153 · Granted Apr 29, 2008

Semiconductor device and method of manufacturing the same

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Quick Facts
Patent No.
US 7,365,430
App. No.
11/027,153
Granted
Apr 29, 2008
Kind
B2
Abstract

Disclosed herein is a semiconductor device and method of manufacturing the same. A step between a memory cell formed in a cell region and a transistor formed in a peripheral circuit region is minimized, and the height of a gate in the memory cell is minimized. Accordingly, subsequent processes are facilitated and the electrical property of the device is thus improved.

Claims (22)

1. A semiconductor device comprising:

an element isolation film which is formed in an element isolation region of a semiconductor substrate, the element isolation film comprising protrusions that project above the semiconductor substrate;

a gate insulating film formed on the semiconductor substrate between the protrusions of the clement isolation film;

a first polysilicon layer of a cylindrical structure, which is formed on the gate insulating film between the protrusions of the element isolation film to form a floating gate;

a second polysilicon layer formed on an inner wall of the first polysilicon layer, wherein the second polysilicon layer is formed on a concave portion of the first polysilicon layer;

a metal layer formed within the second polysilicon layer;

a barrier metal layer formed between the metal layer and the second polysilicon layer, wherein the barrier metal layer comprises one of WN and TiSiN; and

a source/drain formed on the semiconductor substrate at an edge of the first polysilicon layer.

2. The semiconductor device as claimed in claim 1 , further comprising a dielectric turn formed between the first polysilicon layer and the second polysilicon layer.

3. The semiconductor device as claimed in claim 2 , wherein the dielectric film is formed on the entire outer wall of the second polysilicon layer.

4. The semiconductor device as claimed in claim 1 , wherein the content ratio of nitrogen in TiSiN is 25% to 35%.

5. A semiconductor device, comprising:

a gate insulating film formed on a semiconductor substrate;

a lower conductive layer formed on the gate insulating film;

a conductive layer of a cylindrical structure formed over the lower conductive layer;

a metal layer formed within the conductive layer; and

a barrier metal layer formed between the metal layer and the conductive layer, wherein the barrier metal layer comprises one of WN and TiSiN.

6. The semiconductor device as claimed in claim 5 , wherein the content ratio of nitrogen in TiSiN is 25% to 35%.

7. The semiconductor device as claimed in claim 5 , wherein the lower conductive layer is formed of a cylindrical shape.

8. The semiconductor device as claimed in claim 5 , further comprising a dielectric film formed between the lower conductive layer and the conductive layer.

9. The semiconductor device as claimed in claim 8 , wherein the dielectric film is formed on an entire outer wall of the conductive layer.

10. The semiconductor device as claimed in claim 7 , wherein the conductive layer is formed over an inner wall of the lower conductive layer and formed over a concave portion of the lower conductive layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2006
From: HYNIX SEMICONDUCTOR INC.
To: HYNIX SEMICONDUCTOR INC.; STMICROELECTRONICS S.R.L.
Reel/Frame 018207/0057 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2004
From: JEONG, CHEOL M.
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 016148/0732 →