Methods of fabricating semiconductor devices
Methods of fabricating semiconductor devices are disclosed wherein void generation in an insulating interlayer between a pair of gate electrodes is prevented. An illustrated method includes: forming a gate on a semiconductor substrate, forming lightly doped regions in the substrate, forming spacers on sidewalls of the gate with liners disposed between respective ones of the spacers and the sidewalls, forming heavily doped regions which are partially overlapped with the lightly doped regions, removing the spacers, forming an insulating layer over the semiconductor substrate, and forming an insulating interlayer on the insulating layer.
1 . A method of fabricating a semiconductor device comprising:
forming a gate on a semiconductor substrate;
forming lightly doped regions in the substrate;
forming spacers on sidewalls of the gate with liners disposed between respective ones of the spacers and the sidewalls;
forming heavily doped regions in the substrate, the heavily doped regions partially overlapping the lightly doped regions, respectively;
removing the spacers;
forming an insulating layer; and
forming an insulating interlayer on the insulating layer.
2 . A method as defined in claim 1 , further comprising forming a silicide layer on the gate and the heavily doped regions prior to removing the spacers.
3 . A method as defined in claim 1 , wherein removing the spacers comprises dry etching, wet etching, or a combination of dry etching and wet etching.
4 . A method as defined in claim 1 , wherein the spacers are formed from a nitride layer.
5 . A method as defined in claim 1 , wherein the liners are formed from an oxide layer.
6 . A method as defined in claim 1 , wherein removing the spacers comprises:
oxidizing the liners;
removing native oxide from the spacers; and
removing the spacers to expose the liners.