Semiconductor devices and methods for fabricating the same
View Patent ↗Semiconductor devices having an elevated contact region and methods of fabricating the same are disclosed. A disclosed semiconductor device includes a semiconductor substrate, a gate on the semiconductor substrate, spacers on sidewalls of the gate, an epitaxial layer on the semiconductor substrate, source/drain regions within the semiconductor substrate below the epitaxial layer, and low doping concentration regions within the semiconductor below the spacers. In an example, the spacers partially overlap onto the epitaxial layer.
1. A method for fabricating a semiconductor device, comprising:
forming a sacrificial layer pattern on a semiconductor substrate;
forming an epitaxial layer on the substrate;
forming a pad oxide layer after removing the sacrificial layer pattern;
forming a polycrystalline nitride layer on the pad oxide layer;
forming a gate by patterning the polycrystalline nitride layer;
forming a low doping concentration region by doping a predetermined region of the substrate with a first concentration of conductive impurity ions;
forming a buffer oxide layer and a spacer on a sidewall of the gate; and
forming source/drain regions within predetermined areas of the substrate by doping predetermined area of the substrate with a second concentration of conductive impurity ions, the second concentration being higher than the first concentration.
2. A method as defined in claim 1 , wherein forming the sacrificial layer pattern comprises forming an oxide layer and selectively etching the oxide layer.
3. A method as defined in claim 1 , wherein forming the sacrificial pattern layer comprises forming an oxide layer and a nitride layer, and then selectively etching the oxide layer and the nitride layer.
4. A method as defined in claim 3 , wherein the sacrificial layer pattern has a sidewall having a substantially vertical profile, and the sacrificial layer has a thickness which is greater than or equal to a thickness of the epitaxial layer.
5. A method as defined in claim 1 , wherein forming the epitaxial layer occurs after forming the spacer.
6. A method as defined in claim 5 , wherein the spacer is formed to overlap onto the epitaxial layer.