IP Library Granted Patent US 7,205,183
Granted Patent B2
US 7,205,183 · App. 11/029,335 · Granted Apr 17, 2007

Methods of manufacturing thin film transistors using masks to protect the channel regions from impurities while doping a semiconductor layer to form source/drain regions

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Quick Facts
Patent No.
US 7,205,183
App. No.
11/029,335
Granted
Apr 17, 2007
Kind
B2
Abstract

A method of manufacturing a thin film transistor includes forming a semiconductor layer on a substrate; forming a gate insulating layer over the entire surface of the substrate to cover the semiconductor layer; depositing a conductive layer on the gate insulating layer; forming a first photosensitive pattern over the conductive layer; patterning the conductive layer according to the photosensitive pattern to form a gate electrode; and ion-doping an impurity into the semiconductor layer using the photosensitive pattern as a mask to form source and drain regions.

Claims (56)

1. A method of manufacturing a thin film transistor, comprising:

forming a semiconductor layer on a substrate;

forming a gate insulating layer over an entire surface of the substrate to cover the semiconductor layer;

depositing a conductive layer on the gate insulating layer;

depositing a photoresist layer directly on the conductive layer, then patterning the conductive layer using the photoresist layer deposited directly on the conductive layer to form a gate electrode from a portion of the conductive layer, and then removing the photoresist layer, the gate electrode having a density of 1.5 g/cm 3 to 2.5 g/cm 3 and a thickness of more than 4,000 Å to prevent an impurity from passing therethrough; and

ion-doping the impurity into the semiconductor layer using the gate electrode as a mask to form source and drain regions;

wherein part of the impurity impinges directly on the portion of the conductive layer forming the gate electrode without first impinging on any other layer during the ion-doping of the impurity into the semiconductor layer; and

wherein the impurity comprises hydrogen.

2. The method according to claim 1 , wherein the conductive layer comprises one or more layers, such that the gate electrode formed from the conductive layer comprises one or more layers.

3. The method according to claim 2 , wherein the gate electrode comprises Mo, W, MoW, Al, or AlNd, or a combination of two or more thereof.

4. The method according to claim 1 , wherein the impurity further comprises p + -type ions.

5. The method according to claim 1 , wherein the gate electrode comprises Al or AlNd.

6. The method according to claim 1 , wherein the gate electrode has a thickness of 4,000 Å to 4,500 Å.

7. The method according to claim 1 , wherein the conductive layer comprises at least a first layer, a second layer, and a third layer, such that the gate electrode formed from the conductive layer comprises at least a portion of the first layer, a portion of the second layer, and a portion of the third layer;

wherein at least one layer of the first layer, the second layer, and the third layer is made of a first material; and

wherein at least one other layer of the first layer, the second layer, and the third layer is made of a second material different from the first material.

8. The method according to claim 7 , wherein the first layer, the second layer, and the third layer are a first MoW layer, an Al layer, and a second MoW layer.

9. The method according to claim 1 , wherein the conductive layer comprises AlNd, such that the gate electrode formed from the conductive layer comprises AlNd.

10. A method of manufacturing a thin film transistor, comprising:

forming a semiconductor layer on a substrate;

forming a gate insulating layer over an entire surface of the substrate to cover the semiconductor layer;

depositing a conductive layer on the gate insulating layer;

forming a non-desired impurity blocking pattern directly on the conductive layer;

patterning the conductive layer according to the non-desired impurity blocking pattern to form a gate electrode having a density of 1.5 g/cm 3 to 2.5 g/cm 3 and a thickness of more than 4,000 Å;

ion-doping a p + -type impurity into the semiconductor layer using the non-desired impurity blocking pattern as a mask blocking penetration of non-desired impurities to form first source and drain regions; and

removing the non-desired impurity blocking pattern after the ion-doping of the p + -type impurity into the semiconductor layer;

wherein the non-desired impurities comprise hydrogen.

11. The method according to claim 10 , wherein the gate electrode has a thickness of 4,000 Å to 4,500 Å.

12. The method according to claim 10 , wherein the conductive layer comprises at least a first layer, a second layer, and a third layer, such that the gate electrode formed from the conductive layer comprises at least a portion of the first layer, a portion of the second layer, and a portion of the third layer;

wherein at least one layer of the first layer, the second layer, and the third layer is made of a first material; and

wherein at least one other layer of the first layer, the second layer, and the third layer is made of a second material different from the first material.

13. The method according to claim 12 , wherein the first layer, the second layer, and the third layer are a first MoW layer, an Al layer, and a second MoW layer.

14. The method according to claim 10 , wherein the conductive layer comprises AlNd, such that the gate electrode formed from the conductive layer comprises AlNd.

15. A thin film transistor, comprising:

a semiconductor layer on a substrate;

a gate insulating layer extending over an entire surface of the substrate to cover the semiconductor layer;

a conductive layer comprising at least a first layer, a second layer, and a third layer on the gate insulating layer; and

a gate electrode comprising at least a portion of the first layer, a portion of the second layer, and a portion of the third layer formed by patterning the conductive layer using a photoresist and having a predetermined density and a thickness enough to prevent an impurity from passing therethrough;

wherein at least one layer of the first layer, the second layer, and the third layer is made of a first material;

wherein at least one other layer of the first layer, the second layer, and the third layer is made of a second material different from the first material; and

wherein a hydrogen ion density is constant according to a depth of the semiconductor layer in a channel region of the semiconductor layer.

16. The thin film transistor according to claim 15 , wherein the gate electrode has a thickness of at least 3,500 Å.

17. The thin film transistor according to claim 16 , wherein the gate electrode has a thickness of 4,000 Å to 4,500 Å, and a density of 1.5 g/cm 3 to 2.5 g/cm 3 .

18. The thin film transistor according to claim 17 , wherein the gate electrode comprises Al or AlNd.

19. The thin film transistor according to claim 15 , wherein the gate electrode comprises Mo, W, MoW, Al, or AlNd, or a combination of two or more thereof.

20. The thin film transistor according to claim 15 , wherein the impurity comprises p + -type ions.

21. The thin film transistor according to claim 15 , wherein the first layer, the second layer, and the third layer are a first MoW layer, an Al layer, and a second MoW layer.

22. A thin film transistor, comprising:

a semiconductor layer on a substrate:

a gate insulating layer over the entire surface of the substrate to cover the semiconductor layer;

a conductive layer comprising at least a first layer, a second layer, and a third layer on the gate insulating layer; and

a gate electrode comprising at least a portion of the first layer, a portion of the second layer, and a portion of the third layer formed by patterning the conductive layer using a photoresist and having a thickness of at least 3,500 Å to 4,000 Å and a density of 3.5 g/cm 3 to 4.5 g/cm 3 ;

wherein a hydrogen ion density is constant according to a depth of the semiconductor layer in a channel region of the semiconductor layer.

23. The thin film transistor according to claim 22 , wherein the first layer, the second layer, and the third layer are a first MoW layer, an Al layer, and a second MoW layer.

24. The thin film transistor according to claim 22 , wherein at least one layer of the first layer, the second layer, and the third layer is made of a first material; and

wherein at least one other layer of the first layer, the second layer, and the third layer is made of a second material different from the first material.

Assignments (1)
MERGER Recorded Aug 29, 2012
From: SAMSUNG MOBILE DISPLAY CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 028868/0387 →