Reading phase change memories to reduce read disturbs
View Patent ↗Read disturbs in phase change memories may be reduced by progressively reducing the read pulse falling edges. This may reduce the possibility of quenching and inadvertent amorphization of at least a portion of the bit. As a result, in some embodiments, read disturbs may be reduced.
1. A method comprising:
after reading a crystalline phase change memory bit, progressively decreasing the read current to substantially zero current to the phase change memory bit.
2. The method of claim 1 including reducing the read current after reading the bit.
3. The method of claim 2 including linearly reducing the read current to the memory bit.
4. The method of claim 2 including reducing the read current progressively to a bit.
5. The method of claim 1 including reducing the read current to a set bit progressively over approximately 10 nanoseconds.
6. The method of claim 1 including preventing a read disturb by progressively reducing the read current.
7. The method of claim 1 including recrystallizing a set bit alter reading said bit.
8. A method comprising:
reading a phase change memory element in the set state and then recrystallizing said element.
9. The method of claim 8 wherein recrystallizing said element includes progressively decreasing the read current.
10. The method of claim 9 including progressively reducing the read current over approximately 10 nanoseconds.
11. The method of claim 10 including linearly reducing the read current.
12. The method of claim 8 including reducing the read current to reduce read disturb.