MOS transistor and method of manufacturing the same

1. A MOS transistor comprising:

a semiconductor substrate having a projecting portion in which the width of an upper portion thereof is larger than that of a lower portion thereof;

an isolating layer formed in the middle of the projecting portion of the substrate;

first and second drain regions formed within the surface of the projecting portion of the substrate;

first and second source regions formed within the surface of the substrate at a position exterior to the projecting portion;

a gate insulating layer formed on the entire surface of the substrate; and

first and second gates formed on the gate insulating layer at a position exterior to the projecting portion of the substrate, wherein the isolating layer is located between the first and second gates.

2. The MOS transistor of claim 1 , wherein the isolating layer is a deep trench type.

3. The MOS transistor of claim 2 , wherein the depth of the isolating layer is larger than the height of the projecting portion.

4. The MOS transistor of claim 1 , wherein channels are respectively formed vertically within the substrate of the projecting portion adjacent to the first and second gates.