IP Library Granted Patent US 7,701,957
Granted Patent B1
US 7,701,957 · App. 11/040,063 · Granted Apr 20, 2010

Method and apparatus for switching, merging, and demerging data between data communication locations

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Quick Facts
Patent No.
US 7,701,957
App. No.
11/040,063
Granted
Apr 20, 2010
Kind
B1
Abstract

A method and apparatus for switching, merging, and demerging data between data communication locations have been disclosed.

Claims (35)

1. A method comprising:

receiving bursty data on a first interface;

mapping said received bursty data to a virtual port identifier (VID);

performing a reverse lookup of said received bursty data after a control word is received; and

if no match is found:

copying said received bursty data to a wildcard virtual port or dropping said received bursty data;

if a match is found:

performing a mapping of said virtual port identifier (VID) to a first egress logical Identifier (LID);

performing a mapping of said LID to an egress address; and

copying said received bursty data into a memory of a packet fragment processor (PFP) until an egress scheduler determines that said copied received bursty data is to be transferred to an egress interface.

2. The method of claim 1 wherein said first interface is a System Packet Interface (SPI) Level-4A (SPI-4A) interface, and said second interface is a SPI-4M interface.

3. The method of claim 1 wherein a tag comprising one or more bits is pre-pended to said received bursty data stored in the PFP.

4. The method of claim 3 wherein said tag has any programmable value per VID.

5. The method of claim 1 wherein said reverse lookup is after a first 128 bits and the control word is a SPI-4 Start Of Packet (SOP) control word.

6. The method of claim 1 wherein said mapping is achieved using fixed mapping tables that can be dynamically reconfigured.

7. A method comprising:

receiving from a plurality of physical media interfaces (PHY) a plurality of data frames for each PHY;

assigning one or more logical channels in a communication channel for each PHY;

creating an egress buffer for receiving each PHY's said plurality of data frames;

creating one or more queues;

transferring one or more of said plurality of data frames to said one or more queues; and

sending said one or more queues of said transferred data frames to one or more of said logical channels.

8. A method comprising:

receiving data at a first port;

mapping said first port to one or more virtual channels;

transferring said first port data to one or more input queues based on said mapping;

performing an operation on one or more said input queued data and storing said results in one or more output queues;

mapping said one or more virtual channels to a second port; and

sending data from said one or more output queues to said second port.

9. The method of claim 8 wherein said data is encapsulated packet fragments.

10. The method of claim 8 further comprising flow control for said received data and said sent data.

11. The method of claim 8 wherein said operation is selected from the group consisting of switching, merging, de-merging, and tagging.

12. The method of claim 8 further comprising:

performing a reverse lookup on said received data; and

basing said mapping of said first port to one or more virtual channels on said reverse lookup.

Assignments (2)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
SECURITY AGREEMENT Recorded Apr 5, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; MAGNUM SEMICONDUCTOR, INC.; ENDWAVE CORPORATION; CHIPX, INCORPORATED
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042166/0431 →