Metal gate transistor CMOS process and method for making
View Patent ↗A method for forming a semiconductor device ( 100 ) includes a semiconductor substrate ( 102 ) having a first region ( 104 ), forming a gate dielectric ( 108 ) over the first region, forming a conductive metal oxide ( 110 ) over the gate dielectric, forming an oxidation resistant barrier layer ( 111 ) over the conductive metal oxide, and forming a capping layer over the oxidation resistant barrier layer. In one embodiment, the conductive metal oxide is IrO 2 , MoO 2 , and RuO 2 , and the oxidation resistant barrier layer includes TiN.
1. A method for forming a semiconductor device comprising:
providing a semiconductor substrate, wherein the semiconductor substrate has a first region;
forming a gate dielectric over the first region;
forming a conductive metal oxide over the gate dielectric;
forming an oxidation resistant barrier layer over the conductive metal oxide;
forming a capping layer over the oxidation resistant barrier layer;
patterning the conductive metal oxide, oxidation resistant barrier layer, and the capping layer to form a gate having a sidewall, the sidewall extending away from the semiconductor substrate; and
forming a spacer on the sidewall, the spacer extending over an edge of each of the patterned conductive metal oxide, patterned oxidation resistant barrier layer, and the patterned capping layer.
2. The method of claim 1 , wherein the first region is doped n-type.
3. The method of claim 2 , wherein the conductive metal oxide forms at least a part of a PMOS gate electrode.
4. The method of claim 2 , wherein:
the semiconductor substrate comprises a second region;
the second region is doped p-type; and
the forming the semiconductor device further comprises forming an NMOS gate electrode material over the oxidation resistant barrier layer and under the capping layer.
5. The method of claim 4 , wherein forming the NMOS gate electrode further comprises forming a material selected from the group consisting of TaC and TaSiN.
6. The method of claim 1 , wherein the forming the conductive metal oxide further comprising forming the conductive metal oxide comprising an element selected from the group consisting of Ir, Mo, Ru, W, Os, Nb, Ti, V, Ni, and Re.
7. The method of claim 6 , wherein the forming the oxidation resistant barrier layer further comprises forming TiN.
8. The method of claim 1 , wherein the forming the capping layer further comprises forming a polysilicon layer.
9. The method of claim 1 , wherein forming the oxidation resistant barrier layer occurs before annealing the semiconductor substrate.
10. A method for forming a semiconductor device comprising:
providing a semiconductor substrate, wherein the semiconductor substrate has a first region and a second region, and the first region has a different dopant than the second region;
forming a gate dielectric over the first region and the second region;
forming a conductive metal oxide over the gate dielectric in the first region;
forming an oxidation resistant barrier layer over the conductive metal oxide in the first region;
forming a conductive material over the gate dielectric in the second region and forming the conductive material over the oxidation resistant barrier layer in the first region;
forming a capping layer over the conductive material;
patterning the conductive metal oxide, oxidation resistant barrier layer, the conductive material, and the capping layer in the first region to form a gate having a sidewall, the sidewall extending away from the semiconductor substrate; and
forming a spacer on the sidewall, the spacer extending over an edge of each of the patterned conductive metal oxide, patterned oxidation resistant barrier layer, the patterned conductive material, and the patterned capping layer.
11. The method of claim 10 , wherein the first region is doped n-type and the second region is doped p-type.
12. The method of claim 10 , wherein the conductive metal oxide forms at least a part of a P-MOS gate electrode and the conductive material forms at least a part of an N-MOS gate electrode.
13. The method of claim 10 , wherein forming the conductive material further comprises forming a material selected from the group consisting of TaC and TaSiN.
14. The method of claim 10 , wherein the forming the conductive metal oxide further comprising forming the conductive metal oxide comprising an element selected from the group consisting of Ir, Mo, Ru, W, Os, Nb, Ti, V, Ni, and Re.
15. The method of claim 10 , wherein the forming the oxidation resistant barrier layer further comprises forming TiN.
16. The method of claim 10 , wherein forming the oxidation resistant barrier layer occurs before annealing the semiconductor substrate.
17. A semiconductor device comprising:
a semiconductor substrate, wherein the semiconductor substrate has a first region;
a gate dielectric over the first region;
a patterned conductive metal oxide over the gate dielectric;
a patterned oxidation resistant barrier layer over the patterned conductive metal oxide; and
a patterned capping layer over the patterned oxidation resistant barrier layer, wherein the patterned conductive metal oxide, the pattern oxidation resistant barrier layer, and the patterned capping layer for a gate having a sidewall extending from the semiconductor substrate; and
a spacer formed over the sidewall.
18. The semiconductor device of claim 17 , wherein
the conductive metal oxide comprises an element selected from the group consisting of Ir, Mo, Ru, W, Os, Nb, Ti, V, Ni, and Re; and the oxidation resistant barrier layer comprises titanium and nitrogen.