Inductor circuit with a magnetic interface
View Patent ↗An inductor circuit includes a magnetic interface generator that generates a magnetic interface at a center frequency f 0 . The magnetic interface generator is a passive array of spirals that are deposited on one layer of a multi-layer substrate. The magnetic interface is generated in a plane at a distance Z above the surface of the substrate layer that it is printed on, where the antenna is printed on a second layer of the multi-layer substrate. The distance Z where the magnetic interface is created is determined by the cell size of the spiral array, where the cell size is based on the spiral arm length and the spacing S between the spirals. The center frequency of the magnetic interface is determined by the average track length D AV of the spirals in the spiral array. The spacing S of the spiral array is chosen to project the magnetic interface to the second layer in the multi-layer substrate so as to effect performance of an inductor that printed on the second layer.
1. An inductor circuit, comprising:
a first substrate layer having a first surface and a second surface, wherein the first surface is coupled to a ground node;
a planar array of spirals coupled to the second surface of the first substrate layer;
a second substrate layer having a first surface coupled to the planar array of spirals and a second surface; and
an inductor coupled to the second surface of the second substrate layer, wherein the inductor has a first resonance, and wherein the planar array of spirals is configured to generate a magnetic interface approximately in a plane of the inductor to provide a second resonance that is different than the first resonance.
2. The inductor circuit of claim 1 , wherein a center frequency f 0 of the second resonance is based on the following equation:
f
0
=
c
2
D
av
1
+
ɛ
r
2
;
wherein c represents a speed of light, wherein ε r represents a relative dielectric constant of the first substrate layer, and wherein D AV is an average track length of each spiral of the planar array of spirals.
3. The inductor circuit of claim 1 , wherein a first terminal and a second terminal of each spiral of the planar array of spirals is open circuited.
4. The inductor circuit of claim 1 , wherein the planar array of spirals generates the magnetic interface at a distance Z above the second surface of the first substrate layer, wherein the distance Z is based on a spacing S between spirals of the planar array of spirals.
5. The inductor circuit of claim 1 , wherein the planar array of spirals generates the magnetic interface at a distance Z above the second surface of the first substrate layer, and wherein the distance Z is based on a cell size of a first spiral of the planar array of spirals, and wherein the cell size is defined by a length L of an outermost track of the first spiral and a spacing S between the outermost track of the first spiral and an outermost track of a second spiral that is adjacent to the first spiral.
6. The inductor circuit of claim 1 , wherein the planar array of spirals generates the magnetic interface at a distance Z above the second surface of the first substrate layer, and wherein the distance Z is based on a cell size of a first spiral of the planar array of spirals, and wherein the cell size is defined by an outer perimeter of an outermost track of the first spiral and a spacing S between the outermost track of the first spiral and an outermost track of a second spiral that is adjacent to the first spiral.
7. The inductor circuit of claim 1 , wherein the planar array of spirals includes metallization that is printed on the second surface of the first substrate layer.
8. The inductor circuit of claim 1 , wherein the planar array of spirals includes a first spiral having a first outermost track and a second spiral having a second outermost track, wherein an outer perimeter of the first outermost track defines a first cell, and wherein an outer perimeter of the second outermost track defines a second cell adjacent to the first cell, and wherein the first cell and the second cell are spaced apart by a distance S.
9. The inductor circuit of claim 1 , wherein the first resonance is based on a self-resonant frequency of the inductor, and wherein the second resonance is based on a center frequency of the magnetic interface.
10. An inductor circuit, comprising:
a first substrate layer having a first surface and a second surface, wherein the first surface is coupled to a ground node;
a planar array of spirals coupled to the second surface of the first substrate layer;
a second substrate layer having a first surface coupled to the planar array of spirals and a second surface; and
an inductor coupled to the second surface of the second substrate layer;
wherein the inductor circuit has a reflection phase of zero degrees at a self-resonant frequency of the inductor and at a center frequency of a magnetic interface generated by the planar array of spirals.
11. The inductor circuit of claim 10 , wherein the planar array of spirals includes metallization that is printed on the second surface of the first substrate layer.
12. The inductor circuit of claim 10 , wherein the resonant frequency of the inductor and the center frequency of the magnetic interface are different from each other.
13. The inductor circuit of claim 10 , wherein the planar array of spirals generates the magnetic interface approximately in a plane of the inductor.
14. The inductor circuit of claim 10 , wherein the center frequency f 0 of the magnetic interface is based on an average track length D AV of each spiral of the planar array of spirals.
15. The inductor circuit of claim 14 , wherein the average track length D AV is based on the following equation:
D
av
=
c
2
f
0
1
+
ɛ
r
2
wherein c represents a speed of light; and
wherein ε r represents a relative dielectric constant of the substrate.
16. The inductor circuit of claim 10 , wherein a first terminal and a second terminal of each spiral of the planar array of spirals is open circuited.
17. The inductor circuit of claim 10 , wherein the planar array of spirals generates the magnetic interface at a distance Z above the second surface of the first susbstrate layer, wherein the distance Z is based on a spacing S between spirals of the planar array of spirals.
18. The inductor circuit of claim 10 , wherein the panar array of spirals generates the magnetic interface at a distance Z above the second surgace of the first substrate layer, and wherein the distance Z is based on a cell size of a first spiral of the planar array of spirals, and wherein the cell size is defined by an outer perimeter of an outermost track of the first spiral and a spacing S between the outermost track of the first spiral and an outermost track of the first spiral and an outermost track of a second spiral that is adjacent to the first spiral.
19. The inductor circuit of claim 10 , wherein the planar array of spirals includes a first spiral having a first outermost track and a second spiral having a second outermost track, wherein an outer perimeter of the first outermost track defines a first cell, and wherein an outer perimeter of the second outermost track defines a second cell adjacent to the first cell, and wherein the first cell and the second cell are spaced apart by a distance S.