IP Library › Granted Patent US 7,502,000
Granted Patent B2
US 7,502,000 · App. 11/045,109 · Granted Mar 10, 2009

Drive circuit and image forming apparatus using the same

Assignee: Canon Kabushiki Kaisha
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Quick Facts
Patent No.
US 7,502,000
App. No.
11/045,109
Granted
Mar 10, 2009
Kind
B2
Abstract

A drive circuit including a drive transistor for feeding to a load a drive current corresponding to an input signal. The drive circuit has a correction circuit that supplies a correction signal corresponding to an impedance of the load to a gate of the drive transistor to correct the drive current to be fed to the load by the drive transistor, and in which the load is a light-emitting element. One terminal of the light-emitting element is connected to a gate of a transistor for correction, and when a predetermined potential Ps is set to a value calculated by deducting a threshold voltage Vth of the transistor for correction from a terminal potential Pi of the light-emitting element with respect to a drive current, the drive circuit sets a source potential of the transistor for correction to the predetermined potential Ps to thereby generate a voltage corresponding to an impedance of the light-emitting element as a source-to-drain current of the transistor for correction.

Claims (32)

1. A drive circuit comprising:

a drive transistor for feeding to a load a drive current corresponding to an input signal,

wherein the drive circuit has a correction circuit that supplies a correction signal corresponding to an impedance of the load to a gate of the drive transistor to correct the drive current to be fed to the load by the drive transistor, and

wherein the load is a light-emitting element, one terminal of the light-emitting element is connected to a gate of a transistor for correction, and when a predetermined potential Ps is set to a value calculated by deducting a threshold voltage Vth of the transistor for correction from a terminal potential Pi of the light-emitting element with respect to a drive current, the drive circuit sets a source potential of the transistor for correction to the predetermined potential Ps to thereby generate a voltage corresponding to an impedance of the light-emitting element as a source-to-drain current of the transistor for correction.

2. The drive circuit according to claim 1 , wherein the drive circuit inputs the source-to-drain current of the transistor for correction to the gate of the drive transistor as the correction signal.

3. The drive circuit according to claim 1 , wherein the drive circuit sets the source potential of the transistor for correction using a nonlinear element having a variable bias voltage or diode characteristic.

4. The drive circuit according to claim 1 , wherein it is possible to multiply the correction signal with a coefficient according to a setting for a size of the transistor for correction.

5. An image forming apparatus comprising:

a pixel circuit group in which plural pixel circuits, which include (i) a light-emitting element, wherein the light-emitting element is an organic electroluminescent element, and (ii) a drive transistor for feeding a drive current corresponding to an input signal to the light-emitting element, are arranged, wherein each of the pixel circuits has a correction circuit that supplies a correction signal corresponding to an impedance of a load to a gate of the drive transistor and corrects the drive current to be fed to the light-emitting element by the drive transistor;

a photosensitive member;

a charging device for charging the photosensitive member;

an exposure device that has the pixel circuit group arranged at least in a one-dimensional matrix shape and is used for forming a latent image on the photosensitive member according to light emission of the light-emitting element;

a developing device;

a line drive circuit that supplies an image signal to the pixel circuit group; and

an image data supply circuit that supplies image data to the line drive circuit.

6. A drive circuit comprising:

a drive transistor for feeding a drive current corresponding to an input signal to a load;

a storage capacitor that is connected to a control electrode of the drive transistor and used for retaining an input signal;

a detection circuit for detecting a resistance of the load, wherein the detection circuit includes a second capacitor that is connected to a terminal, which is connected to the load, via a switching transistor; and

a correction circuit that feeds back a result of the detection by the detection circuit to the drive transistor to correct a drive current to be fed to the load by the drive transistor, wherein the correction circuit includes a transistor for correction that has a control electrode connected to the second capacitor and is used for changing a potential of the control electrode of the drive transistor.

7. An image forming apparatus comprising:

(a) a pixel circuit group in which plural pixel circuits are arranged, which include a light-emitting element serving as a load and a drive circuit, said drive circuit comprising:

(i) a drive transistor for feeding a drive current corresponding to an input signal to a load;

(ii) a storage capacitor that is connected to a control electrode of the drive transistor and used for retaining an input signal;

(iii) a detection circuit for detecting a resistance of the load; and

(iv) a correction circuit that feeds back a result of the detection by the detection circuit to the drive transistor to correct a drive current to be fed to the load by the drive transistor;

(b) a photosensitive member;

(c) a charging device for charging a photosensitive member;

(d) an exposing device that has the pixel circuit group arranged at least in a one-dimensional matrix shape and is used for forming a latent image on a photosensitive member according to light emission of the light-emitting element;

(e) a developing device;

(f) a line drive circuit that supplies an image signal to the pixel circuit group; and

(g) an image data supply circuit that supplies image data to the line drive circuit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2005
From: YUKI, OSAMU; NAKAJIMA, YOSHINORI; KONDO, SHIGEKI
To: CANON KABUSHIKI KAISHA
Reel/Frame 016231/0256 →
Priority Claims (1)
JP 2004-035295 · Feb 12, 2004 · national
Continuity (1)
Related Publication 20050179626A1 · Aug 18, 2005