Dynamic data dependence tracking and its application to branch prediction
View Patent ↗A data dependence table in RAM relates physical register addresses to instructions such that for each instruction, the registers on whose data the instruction depends are identified. The table is updated for each instruction added to the pipeline. For a branch instruction, the table identifies the registers relevant to the branch instruction for branch prediction.
1. A method for dynamically tracking data dependence of a plurality of instructions in a pipeline to be executed by a processor, the method comprising:
in a memory which is organized as a plurality of rows and a plurality of columns, each of the plurality of rows corresponding to a register and each of the plurality of columns corresponding to one of the plurality of instructions in the pipeline or to an instruction to be added to the pipeline, wherein the registers are assigned to the rows consecutively, providing in each intersection of a row and a column, an indication of whether the register corresponding to the row is data dependent on the instruction corresponding to the column; and
identifying, in a row of the memory, which of the columns correspond to the plurality of instructions in the pipeline and which of the columns correspond to the instructions to be added to the pipeline.
2. The method of claim 1 further comprising:
allocating one of the columns to the instruction to be added responsive to the instruction to be added being added to the pipeline;
identifying which of the columns is allocated to the instruction being added;
determining a data dependency which each of the registers will have when the instruction being added is executed; and
identifying, in the column allocated to the instruction to be added, the data dependency.
3. The method of claim 2 , wherein the determining is performed in accordance with the columns corresponding to the registers which will be read in the instruction to be added.
4. A dynamic data dependence tracking system, comprising:
a plurality of registers;
a plurality of instructions in a pipeline;
at least one instruction to be added to the pipeline;
a memory organized as a plurality of rows and a plurality of columns, each of the plurality of rows corresponding to one of the plurality of registers and each of the plurality of columns corresponding to one of the plurality of instructions in the pipeline or to the at least one instruction to be added to the pipeline; and
an indication at each intersection of a row and a column of whether a value of the register corresponding to the row is data dependent on the instruction corresponding to the column; and
where at least one of the plurality of rows is configured to indicate which of the plurality of columns corresponds to the plurality of instructions in the pipeline and which of the plurality of columns corresponds to the at least one instruction to be added to the pipeline.
5. The dynamic data dependence tracking system of claim 4 where the memory includes a data dependence table to track a number of data dependent instructions trailing each of the plurality of instructions.
6. The dynamic data dependence tracking system of claim 5 where memory includes a counter to count a number of data dependent instructions trailing each of the plurality of instructions.
7. The dynamic data dependence tracking system of claim 6 where the counter is associated with each row in the data dependence table.
8. The dynamic data dependence tracking system of claim 6 where the counter is configured to update the number of data dependent instructions trailing each of the plurality of instructions on a cycle-by-cycle basis.
9. The dynamic data dependence tracking system of claim 6 where the counter is configured to provide data dependence chain information for each instruction thread associated with the plurality of instructions.
10. The dynamic data dependence tracking system of claim 7 where the data dependence chain information includes an average length of a chain associated with each instruction thread.
11. The dynamic data dependence tracking system of claim 6 comprising an execution unit to predict a branch responsive to the number of data dependent instructions trailing each of the plurality of instructions exceeding a predetermined threshold.
12. The dynamic data dependence tracking system of claim 11 comprising a branch execution unit to execute in parallel to the execution unit, a subset of the plurality of instructions responsive to a data dependence chain in the data dependence table.
13. The dynamic data dependence tracking system of claim 11 where the execution unit is configured to save power responsive to calculating a parallelism metric using a data dependence chain in the data dependence table.
14. The dynamic data dependence tracking system of claim 11 where the memory includes an issue queue; and
where the execution unit is configured to size the issue queue responsive to calculating a parallelism metric using a data dependence chain in the data dependence table.
15. The dynamic data dependence tracking system of claim 11 where the execution unit is configured to identify critical instructions responsive to using a data dependence chain in the data dependence table.
16. The dynamic data dependence tracking system of claim 5 comprising a predictor configured to predict a branch instruction by correlating a value in at least one register associated with at least one instruction along a data dependence chain leading up to a branch.