Semiconductor device
View Patent ↗An insulating film is provided in a region surrounding a circuit region on a p type silicon substrate, and a frame-shaped electrode is provided to surround the circuit region on the insulating film. The region directly under the electrode at the surface of the p type silicon substrate is formed as a non-doped region with no impurity implanted. Then, a positive power supply potential is applied to the electrode. In this way, a depletion layer is formed directly under the electrode at the surface of the p type silicon substrate. Consequently, the substrate noise is shielded.
1. A semiconductor device comprising:
a semiconductor substrate;
a plurality of circuits at different regions at a surface of said semiconductor substrate;
an insulating film provided in a region between said plurality of circuits on said semiconductor substrate; and
an electrode provided on said insulating film, wherein said electrode is provided with a potential that causes a depletion layer to be formed in a region directly under said electrode at the surface of said semiconductor substrate, so that a current is prevented from passing between said plurality of circuits.
2. The semiconductor device according to claim 1 , wherein said region directly under said electrode at the surface of said semiconductor substrate is a non-doped region with no impurity implanted.
3. The semiconductor device according to claim 1 , wherein said semiconductor substrate is a p type semiconductor substrate and said potential is a positive power supply potential.
4. The semiconductor device according to claim 1 , wherein said semiconductor substrate is an n type semiconductor substrate and said potential is a negative power supply potential.
5. The semiconductor device according to claim 1 , wherein at least one of said plurality of circuits comprises at least one field effect transistor, said at least one field effect transistor comprising:
a gate comprising said insulating film; and
a gate electrode provided on said insulating film, wherein said gate electrode and said electrode comprise a conductive material.
6. The semiconductor device according to claim 1 , wherein said electrode and said insulating film are formed to surround one of said plurality of circuits.
7. The semiconductor device according to claim 1 , wherein said insulating film comprises silicon oxide.
8. The semiconductor device according to claim 1 , wherein said electrode comprises polysilicon.
9. The semiconductor device according to claim 5 , wherein said insulating film comprises silicon oxide.
10. The semiconductor device according to claim 5 , wherein said conductive material is polysilicon.
11. The semiconductor device according to claim 1 wherein said insulating film is provided between said plurality of circuits and said electrode.
12. The semiconductor device according to claim 11 , wherein said plurality of circuits comprises at least one of digital circuits and analog circuits.
13. The semiconductor device according to claim 1 , further comprising:
a shallow trench isolation region provided at a surface of said semiconductor substrate between said electrode and said plurality of circuits,
wherein said electrode is disposed adjacent to said shallow trench isolation region.
14. A semiconductor device comprising:
a semiconductor substrate;
a plurality of circuits at different regions at a surface of said semiconductor substrate;
an insulating film provided in a region between said plurality of circuits on said semiconductor substrate, said insulating film surrounding at least one of said plurality of circuits; and
an electrode comprising a conductive material provided on said insulating film, wherein said electrode is provided with a potential that causes a depletion layer to be formed in a region directly under said electrode at the surface of said semiconductor substrate.
15. The semiconductor device according to claim 14 , wherein said region directly under said electrode at the surface of said semiconductor substrate is a non-doped region with no impurity implanted.
16. The semiconductor device according to claim 14 , wherein said semiconductor substrate is a p type semiconductor substrate and said potential is a positive power supply potential.
17. The semiconductor device according to claim 14 , wherein said semiconductor substrate is an n type semiconductor substrate and said potential is a negative power supply potential.
18. The semiconductor device according to claim 14 , wherein said insulating film is silicon oxide.
19. The semiconductor device according to claim 14 , wherein said conductive material is polysilicon.
20. A semiconductor device comprising:
a first circuit comprising a plurality of devices disposed on a first portion of a semiconductor substrate;
a second circuit comprising a plurality of devices disposed on a second portion of the semiconductor substrate; and
an isolating structure formed between the first portion and the second portion of the semiconductor substrate which prevents current from passing between the first portion and the second portion of the semiconductor substrate, wherein the isolating structure comprises an insulating film, and an electrode provided on the insulating film, and wherein the electrode is provided with a potential causing formation of a depletion layer in a region of the semiconductor substrate under the electrode.
21. The semiconductor device according to claim 20 further comprising:
a plurality of circuits; and
a plurality of isolating structures formed their between.