IP Library Granted Patent US 7,265,631
Granted Patent B2
US 7,265,631 · App. 11/078,539 · Granted Sep 4, 2007

Transimpedance amplifier with signal amplification circuit that performs power signal regulation

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Quick Facts
Patent No.
US 7,265,631
App. No.
11/078,539
Granted
Sep 4, 2007
Kind
B2
Abstract

The transimpedance amplifier that performs signal amplification includes a first input that receives an input signal, a second input that receives a power signal, a third input that receives a control signal, and an output that generates an output signal. The transimpedance amplifier includes at least one signal amplification circuit that receives the power signal, input signal, and the control signal and that performs both signal amplification on the input signal and regulation of the power signal in response to the control signal.

Claims (33)

1. A system comprising:

a light sensor configured to generate an input current signal in response to light energy;

a transimpedance amplifier configured to generate an output signal in response to the input current signal, the transimpedance amplifier comprising a first amplifier stage; and a self-biased regulator configured to vary a current flowing through a transistor of the first amplifier stage resulting thereof in a change of gain of the first amplifier stage and further resulting in a voltage regulation at a bias node of the transimpedance amplifier; and

a current source that generates a current, I top; wherein the first amplifier stage utilizes at least a portion of the current for signal amplification; and wherein the self-biased regulator utilizes a portion of the current for the voltage regulation of the bias node of the transimpedance amplifier.

2. The system of claim 1 wherein the transimpedance amplifier comprises a plurality of amplifier stages to provide the output signal in response to the input current signal.

3. The system of claim 2 , wherein the transimpedance amplifier further comprises a feed-back circuit to affect an amplification gain between the input current signal and the output signal in response to the output signal.

4. The system of claim 1 , wherein the transimpedance amplifier further comprises a reference signal setting circuit that controls the self-biased regulator.

5. The system of claim 1 wherein the light sensor includes one of a photodiode and a photodetector.

6. The system of claim 1 implemented in an optical isolation application.

7. The system of claim 1 implemented in one of a light sensor application and a light sensor pre-amplifier.

8. The system of claim 1 implemented in an optical media application.

9. A transimpedance amplifier, comprising:

a current source configured to provide a supply current to a bias node;

a first amplifier stage comprising a first amplifying transistor and a first load transistor coupled to the bias node such that a first portion of the supply current flows through both transistors, and wherein the first amplifier stage has a stage gain equal to a ratio of the gain of the first load transistor and the gain of the first amplifying transistor; and

a power supply regulator circuit comprising a sense transistor configured as an emitter follower with a first electrode coupled to the bias node and a second electrode coupled to the first load transistor whereby a change in voltage at the bias node results in a change of the first portion of the supply current flowing through the first load transistor and the first amplifying transistor thereby resulting in a change of the stage gain of the first amplifier stage and further resulting in a voltage regulation at the bias node.

10. The transimpedance amplifier of claim 9 , wherein the sense transistor is a field-effect transistor (FET), the first electrode is a gate electrode of the FET, and the second electrode is a source electrode of the FET.

11. The transimpedance amplifier of claim 9 implemented in one of an optical isolation application, a light sensor application and a light sensor pre-amplifier.

12. The transimpedance amplifier of claim 9 implemented in an optical media application.

13. The transimpedance amplifier of claim 9 , further comprising:

a second amplifier stage comprising a second amplifying transistor and a second load transistor coupled to the bias node such that a second portion of the supply current flows through both transistors, and wherein the second amplifier stage has a stage gain equal to a ratio of the gain of the second load transistor and the gain of the second amplifying transistor.

14. The transimpedance amplifier of claim 13 , further comprising:

a third amplifier stage comprising a third amplifying transistor and a third load transistor coupled to the bias node such that a third portion of the supply current flows through both transistors, wherein the third amplifier stage has a stage gain equal to a ratio of the gain of the third load transistor and the gain of the third amplifying transistor; and

a current mirror circuit comprising the third load transistor and a fourth transistor that is a part of the second amplifier stage.

15. A method for transimpedance amplification, the method comprising:

providing a transimpedance amplifier;

receiving an input current signal in the transimpedance amplifier;

generating a control signal in the transimpedance amplifier; and

using the control signal to provide power supply regulation by controlling an amplification gain of the transimpedance amplifier.

16. The method of claim 15 , wherein providing the transimpedance amplifier comprises:

providing a current source configured to provide a supply current to a bias node; and

providing a first amplifier stage comprising a first amplifying transistor and a first load transistor coupled to the bias node such that a first portion of the supply current flows through both transistors, and wherein the first amplifier stage has a stage gain equal to a ratio of the gain of the first load transistor and the gain of the first amplifying transistor.

17. The method of claim 16 , wherein generating the control signal comprises:

providing a sense transistor configured as an emitter follower with a gate electrode coupled to the bias node and a source electrode coupled to the first load transistor, whereby a change in voltage at the bias node results in a change of the first portion of the supply current flowing trough the first load transistor and the first amplifying transistor thereby resulting in a change of the stage gain of the first amplifier stage and further resulting in a power supply regulation at the bias node.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032851-0001) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 037689/0001 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032851/0001 →