IP Library Granted Patent US 7,122,452
Granted Patent B2
US 7,122,452 · App. 11/081,798 · Granted Oct 17, 2006

Method of manufacturing a semiconductor on a silicon on insulator (SOI) substrate using solid epitaxial regrowth (SPER) and semiconductor device made thereby

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Quick Facts
Patent No.
US 7,122,452
App. No.
11/081,798
Granted
Oct 17, 2006
Kind
B2
Abstract

A method of producing a semiconductor device on a silicon on insulator (SOI) substrate is disclosed. In one aspect, the method comprises providing a device with a monocrystalline semiconductor layer on an insulating layer; providing a mask on the semiconductor layer to provide first shielded portions and first unshielded portions, amorphizing the first unshielded portions to yield first amorphized portions of the monocrystalline semiconductor layer, implanting a first dopant in the first amorphized portions, applying a first solid phase epitaxial regrowth action to the semiconductor device while using the first shielded portions as monocrystalline seeds.

Claims (19)

1. A method of producing a semiconductor devices comprising:

providing a device with a monocrystalline semiconductor layer on an insulating layer;

providing a mask on the semiconductor layer to form first shielded portions and first unshielded portions;

amorphizing the first unshielded portions to yield first amorphized portions of the monocrystalline semiconductor layer;

implanting a first dopant in the first amorphized portions; and

applying a first solid phase epitaxial regrowth action to the semiconductor device while using the first shielded portions as monocrystalline seeds.

2. The method according to claim 1 , further comprising:

providing a second mask on the semiconductor layer to provide second shielded portions and second unshielded portions, at least some of the second unshielded portions substantially coinciding with the first shielded portions;

amorphizing the at least some of the second unshielded portions to yield second amorphized portions;

implanting a second dopant in the second amorphized portions; and

applying a second solid phase epitaxial regrowth action to the semiconductor device.

3. The method according to claim 2 , wherein the second solid phase epitaxial regrowth action includes annealing at a temperature between about 550° C. and about 750° C. during a period of about 1 second to about 1 minute.

4. The method according to claim 1 , wherein the semiconductor layer has a thickness of between about 10 nm and about 100 nm.

5. The method according to claim 1 , wherein the insulating layer is silicon dioxide (SiO 2 ).

6. The method according to claim 1 , wherein the amorphizing is performed with particles selected from the set of Ge, GeF 2 and Si.

7. The method according to claim 1 , wherein the amorphizing and the implanting are simultaneously performed with As.

8. The method according to claim 1 , wherein the first solid phase epitaxial regrowth action includes annealing at a temperature between about 550° C. and about 750° C. during a period of about 1 second to about 1 minute.

9. A semiconductor device made by a method according to claim 1 .

10. An apparatus comprising a semiconductor device according to claim 9 .

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Jan 28, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 037614/0856 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 7, 2015
From: NXP B.V.
To: III HOLDINGS 6, LLC
Reel/Frame 036304/0330 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 13, 2009
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 022092/0572 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 10, 2005
From: PAWLAK, BARTLOMIEJ JAN
To: INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM (IMEC); KONINKLIJKE PHILIPS ELECTRONICS
Reel/Frame 016325/0427 →