Method of fabricating semiconductor device and semiconductor fabricated by the same method
View Patent ↗A method of fabricating a semiconductor device and a semiconductor device fabricated by the same method are disclosed. The method includes: depositing a silicon layer containing amorphous silicon on a substrate using any one of a plasma enhanced chemical vapor deposition (PECVD) method and a low pressure chemical vapor deposition (LPCVD) method; annealing the silicon layer in an H 2 O atmosphere at a certain temperature to form a polycrystalline silicon layer; forming a gate insulating layer on the polycrystalline silicon layer; forming impurity regions in the polycrystalline silicon layer to define source and drain regions; and activating the impurity regions. Thus, it is possible to provide a semiconductor device, in which the substrate is prevented from being bent and polycrystalline silicon constituting a semiconductor layer is excellent.
1. A method of fabricating a semiconductor device, comprising:
depositing a silicon layer containing amorphous silicon on a substrate using a plasma enhanced chemical vapor deposition (PECVD) method or a low pressure chemical vapor deposition (LPCVD) method;
annealing the silicon layer in an H 2 O atmosphere at a temperature to form a polycrystalline silicon layer via solid phase crystallization, the annealing being for less than 10 minutes;
forming a gate insulating layer on the polycrystalline silicon layer over an entire surface of the substrate;
forming impurity regions in the polycrystalline silicon layer to define source and drain regions; and
activating the impurity regions,
wherein the H 2 O pressure is in a range of 10,000 Pa to 2 MPa, and the temperature is in a range of 550 to 750° C.
2. The method according to claim 1 , wherein the temperature is in a range of 600 to 710° C.
3. The method according to claim 1 , wherein the silicon layer has a thickness of less than 2,000 Å.
4. The method according to claim 3 , wherein the silicon layer has a thickness of 300 to 1,000 Å.
5. The method according to claim 1 , wherein activating the impurity regions comprises crystallizing non-crystallized amorphous silicon in the polycrystalline silicon layer and at the same time activating the impurity regions by irradiating the impurity regions with a laser.
6. The method according to claim 1 , wherein the PECVD method is performed using SiH 4 +Ar and/or H 2 under a pressure of 1 to 1.5 Torr at a temperature of 330 to 430° C., and the LPCVD method is performed using Si 2 H 6 +Ar under a pressure of 0.2 to 0.4 Torr at a temperature of 400 to 500° C.
7. A method of fabricating a semiconductor device, comprising:
depositing a silicon layer containing amorphous silicon on a substrate using a plasma enhanced chemical vapor deposition (PECVD) method or a low pressure chemical vapor deposition (LPCVD) method;
doping the silicon layer with impurity ions to define source and drain regions;
patterning the amorphous silicon to form a semiconductor layer;
forming a gate insulating layer on the semiconductor layer over an entire surface of the substrate;
forming a gate electrode on the gate insulating layer, the gate electrode corresponding to a channel region of the semiconductor layer; and
annealing the amorphous silicon in an H 2 O atmosphere at a temperature to crystallize the amorphous silicon via solid phase crystallization and activate the impurity ions, the annealing being for less than 10 minutes,
wherein the H 2 O pressure is in a range of 10,000 Pa to 2 MPa, and the temperature is in a range of 550 to 750° C.
8. The method according to claim 7 , wherein the temperature is in a range of 600 to 710° C.
9. The method according to claim 7 , wherein the silicon layer has a thickness of less than 2,000 Å.
10. The method according to claim 9 , wherein the silicon layer has a thickness of 300 to 1,000 Å.
11. The method according to claim 7 , wherein the PECVD method is performed using SiH 4 +Ar and/or H 2 under a pressure of 1 to 1.5 Torr at a temperature of 330 to 430° C., and the LPCVD method is performed using Si 2 H 6 +Ar under a pressure of 0.2 to 0.4 Torr at a temperature of 400 to 500° C.
12. A method of fabricating a semiconductor device, comprising:
forming a gate electrode on a substrate;
forming a gate insulating layer on the gate electrode over an entire surface of the substrate;
depositing a silicon layer containing amorphous silicon on the gate insulating layer using a plasma enhanced chemical vapor deposition (PECVD) method or a low pressure chemical vapor deposition (LPCVD) method;
doping impurity ions into the silicon layer using photoresist to define source and drain regions;
removing the photoresist and then annealing the amorphous silicon in an H 2 O atmosphere at a certain temperature to crystallize the amorphous silicon via solid phase crystallization and to activate the impurity ions, the annealing being for less than 10 minutes; and
depositing and patterning a metal layer to form source and drain electrodes in the source and drain regions,
wherein the H 2 O pressure is in a range of 10,000 Pa to 2 MPa, and the temperature is in a range of 550 to 750° C.
13. The method according to claim 12 , wherein the temperature is in a range of 600 to 710° C.
14. The method according to claim 12 , wherein the silicon layer has a thickness of less than 2,000 Å.
15. The method according to claim 14 , wherein the silicon layer has a thickness of 300 to 1,000 Å.
16. The method according to claim 12 , wherein the PECVD method is performed using SiH 4 +Ar and/or H 2 under a pressure of 1 to 1.5 Torr at a temperature of 330 to 430° C., and the LPCVD method is performed using Si 2 H 6 +Ar under a pressure of 0.2 to 0.4 Torr at a temperature of 400 to 500° C.