Self-timed sneak current cancellation
View Patent ↗A sensing circuit. The circuit includes an integrator to sense charge release from a passive electronic device and a comparator to interpret the charge release as one of at least two data states. The circuit also includes a compensation module to generate a compensation signal as needed and a self-timing module to adjust timing of the integrator sensing based upon a predefined voltage level.
1. A timing circuit, comprising:
a control module to decode command signals and generate control signals based upon those command signals;
a voltage generator to generate a threshold voltage signal in response to the control signals;
an amplifier to amplify a reference voltage signal; and
a comparator to detect when the reference voltage becomes substantially equal to the threshold voltage and to generate a read out signal.
2. The timing circuit of claim 1 , wherein the amplifier further comprises a pre-amplifier.
3. The timing circuit of claim 1 , wherein the timing circuit further comprises a timeout timer to generate a timeout signal, wherein the timeout signal causes the comparator to generate the read out signal regardless of the level of the reference voltage.
4. The timing circuit of claim 1 , wherein the threshold voltage signal is adaptively adjustable.
5. The timing circuit of claim 1 , wherein the threshold voltage signal is adjustable by the user.
6. A system, comprising:
a timing circuit, comprising:
a control module to decode command signals and generate control signals based upon those command signals;
a voltage generator to generate a threshold voltage signal in response to the control signals;
an amplifier to amplify a reference voltage signal; and
a comparator to detect when the reference voltage becomes substantially equal to the threshold voltage and to generate a read out signal; and
a memory array to receive the read out signal.
7. The system of claim 6 , wherein the amplifier further comprises a pre-amplifier.
8. The system of claim 6 , wherein the timing circuit further comprises a timeout timer to generate a timeout signal, wherein the timeout signal causes the comparator to generate the read out signal regardless of the level of the reference voltage.
9. A method of timing signals, comprising:
decoding command signals and generating control signals based upon those command signals at a control module;
generating a threshold voltage signal in response to the control signals at a voltage generator;
amplifying a reference voltage signal; and
comparing the threshold voltage signal to the reference voltage signal at a comparator to detect when the reference voltage becomes substantially equal to the threshold voltage and to generate a read out signal.
10. The method of claim 9 , the method further comprising generating a timeout signal, wherein the timeout signal causes the comparator to generate the read out signal regardless of the level of the reference voltage.
11. The method of claim 9 , wherein generating the threshold voltage signal further comprises generating an adaptively adjustable threshold signal.
12. The method of claim 9 , wherein generating the threshold voltage signal further comprises allowing a user to adjust the threshold voltage signal.