IP Library Granted Patent US 7,404,064
Granted Patent B2
US 7,404,064 · App. 11/101,355 · Granted Jul 22, 2008

Method and device for calculating addresses of a segmented program memory

Assignee: STMicroelectronics S.A.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,404,064
App. No.
11/101,355
Granted
Jul 22, 2008
Kind
B2
Abstract

A method and a device for converting a virtual address of a program executed by a processor and provided by a program counter into a physical address in a program memory, the program having been stored in the memory in at least one segment of consecutive addresses. The method includes adding to each address provided by the program counter a number corresponding to the offset between the memory address and the virtual address provided by the program counter, and detecting a possible overflow from the current segment by comparing the obtained physical address with the start and end addresses of the considered segment.

Claims (13)

1. A method for converting a virtual address of a program executed by a processor and provided by a program counter into a physical address in a program memory, the program is being stored in the memory in at least one segment of consecutive addresses, comprising: adding to the virtual address provided by the program counter a number corresponding to an offset assigned to a current segment to obtain the physical address; and comparing the obtained physical address with start and end addresses of the current segment to detect an over flow from the current segment and generate an interrupt to the processor; wherein the interrupt is generated to update by the processor the offset, the start address and the end address of the current segment with an offset, a start address and an end address of a new segment addressed by the obtained physical address.

2. The method of claim 1 , wherein a table comprising a number of the at least one segment, and at least one of start and end addresses of each of the at least one segment is stored in non-volatile memory.

3. The method of claim 2 , wherein said table is established upon initial loading of the program into the program memory.

4. The method of claim 1 , wherein the offset to be applied to the virtual addresses provided by the program counter and the start and end addresses of the current segment are updated by the processor on each change of a memory segment in the memory.

5. A device for converting a virtual address provided by a program counter of a processor into a physical address of an instruction line in at least one segment of consecutive addresses of a memory, comprising: three registers respectively containing an offset to be applied to the virtual address, a physical start address of a current segment in the memory, and a physical end address of the current segment; means for adding to the virtual address provided by the program counter the offset contained in the first register to generate the physical address, without modifying the value of said program counter; and means for comparing the generated physical address with the respective addresses contained in the second and third registers to detect an overflow from the current segment and generate an interrupt to the processor; wherein, upon generating the interrupt, the three registers respectively containing the offset, the physical start address and the physical end address of the current segment are reloaded respectively with an offset, a physical start address and a physical end address of a new segment addressed by the obtained physical address.

6. The device of claim 5 , wherein the three registers are updated by the processor at each change of a memory segment in the memory.

7. The method of claim 1 , wherein a table comprising a number of the at least one segment, the start address and a size of each of the at least one segment is stored in a non-volatile memory.

8. The method of claim 1 , wherein the program is being stored in the memory in a plurality of segments that are not consecutive.

9. The method of claim 1 , wherein a size of instructions of the program is known in advance.

10. The method of claim 2 , wherein the table further comprises an offset assigned to the at least one segment.

11. The method of claim 7 , wherein the table further comprises an offset assigned to the at least one segment.

12. The device of claim 5 , wherein a table comprising a number of the at least one segment and the physical start and end addresses of each of the at least one segment is stored in non-volatile memory.

13. The device of claim 12 , wherein the table further comprises an offset assigned to the at least one segment.

Assignments (2)
CHANGE OF NAME Recorded Jan 21, 2024
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS FRANCE
Reel/Frame 066357/0408 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2005
From: SONZOGNI, JACQUES
To: STMICROELECTRONICS, S.A.
Reel/Frame 016458/0427 →
Priority Claims (1)
FR 04 50704 · Apr 7, 2004 · national
Continuity (1)
Related Publication 20050228965A1 · Oct 13, 2005