Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates
A method for forming a MEMS device is disclosed, where a final release step is performed just prior to a wafer bonding step to protect the MEMS device from contamination, physical contact, or other deleterious external events. Without additional changes to the MEMS structure between release and wafer bonding and singulation, except for an optional stiction treatment, the MEMS device is best protected and overall process flow is improved. The method is applicable to the production of any MEMS device and is particularly beneficial in the making of fragile micromirrors.
1 . A wafer assembly comprising:
a lower wafer comprising a plurality of mirror device areas each mirror device area comprising a mirror array having a rectangular active area and a plurality of deflectable reflective mirrors within the rectangular active area;
wherein the mirrors have mirror edges that are neither parallel nor perpendicular to edges of the active area;
an upper wafer bonded in spaced apart relationship to the lower wafer; and
an intermediate wafer bonded between the upper and lower wafer and having open areas corresponding to each mirror device location.
2 . The wafer assembly of claim 1 , further comprising a light blocking material on the upper wafer.
3 . The wafer assembly of claim 2 , wherein the light blocking material is provided as a rectangular mask at each mirror array device location.
4 . The wafer assembly of claim 1 , wherein each mirror device comprises a plurality of mirror elements.
5 . The wafer assembly of claim 1 , wherein a cavity is defined by the lower wafer, the intermediate wafers and the upper wafer, and wherein the mirror devices comprise mirror elements that can move within the cavity.
6 . The wafer assembly of claim 5 , wherein the lower wafer is a semiconductor wafer.
7 . The wafer assembly of claim 6 , wherein the lower wafer is a silicon wafer.
8 . The wafer assembly of claim 1 , wherein the upper wafer is a light transmissive wafer.
9 . The wafer assembly of claim 6 , wherein the upper wafer is a glass or quartz wafer.
10 . The wafer assembly of claim 1 , wherein the upper and lower wafer are cut or scribed around each mirror device.
11 . The wafer assembly of claim 1 , wherein the upper and lower wafers are round or substantially round.
12 . The wafer assembly of claim 11 , wherein the lower wafer is 12 inches in diameter.
13 . The wafer assembly of claim 9 , wherein the mirror elements are substantially square in shape.
14 . The wafer assembly of claim 9 , further comprising torsion hinges that allow the mirror elements to move relative to the upper and lower wafers.
15 . The wafer assembly of claim 14 , wherein the hinge has a thickness of 50 Å to 2100 Å.
16 . The wafer assembly of claim 9 , wherein the hinges are formed in the same plane as the reflective mirrors.
17 . The wafer assembly of claim 9 , wherein the hinges are formed separated from and parallel to the mirror element in a different plane from the mirror element.
18 . The wafer assembly of claim 14 , wherein the lower wafer comprises an array of electrodes disposed to electrostatically deflect the mirror elements.
19 . The wafer assembly of claim 18 , wherein the electrodes are designed to run at 0-5 V.
20 . The wafer assembly of claim 9 , comprising an SRAM cell at each mirror element.
21 . The wafer assembly of claim 1 , wherein a mirror device of the plurality of mirror devices has XGA resolution.
22 . The wafer assembly of claim 1 , wherein the wafers are bonded together with an adhesive.
23 . The wafer assembly of claim 9 , wherein the wafers are bonded together with an epoxy.
24 . The wafer assembly of claim 9 , wherein the mirror devices comprise a stiction treatment.
25 . The wafer assembly of claim 1 , wherein wafers are anodic bonded together.
26 . The wafer assembly of claim 17 , wherein the wafers are solder bonded together.
27 . The wafer assembly of claim 1 , wherein the wafers are compression, anodic, fusion or metal eutectic bonded together.
28 . The wafer assembly of claim 1 , wherein the mirror devices have an anti-stiction layer.
29 . The wafer assembly of claim 20 , wherein a gap between the upper and lower wafer has a size that is from 1 to 100 um.
30 . The wafer assembly of claim 22 , wherein the adhesive is a UV cured adhesive.
31 . The wafer assembly of claim 23 , wherein the epoxy is a UV cured epoxy.
32 . The wafer assembly of claim 1 , comprising saw streets on the lower wafer.
33 . The wafer assembly of claim 32 , wherein the saw streets are to a depth of 50 to 90% of the wafer thickness.
34 . The wafer assembly of claim 9 , wherein the upper wafer and lower wafer comprise saw streets from 50 to 95% of the wafer thickness.
35 . The wafer assembly of claim 23 , wherein the mirror devices comprise at least 1000 movable mirrors.
36 . The wafer assembly of claim 20 , wherein the mirror devices comprise between 1 and 6 million mirror elements.
37 . The wafer assembly of claim 20 , wherein the mirror devices comprises a plurality of micromirrors disposed within a rectangular array.
38 . The wafer assembly of claim 1 , comprising horizontal and vertical score or partial saw lines.
39 . The wafer assembly of claim 38 , wherein the score or partial saw lines are offset from each other at least in one of the horizontal or vertical directions.
40 . The wafer assembly of claim 1 , wherein the mirror devices on the lower wafer comprise circuitry and micromechanical structures formed monolithically on the same substrate.
41 . The wafer assembly of claim 40 , further comprising an area of a lubricant.
42 . The wafer assembly of claim 5 , wherein a plurality of cavities are formed and defined by each open portion of the one or more intermediate wafers and the upper and lower wafers with a mirror device comprising a plurality of movable mirrors are disposed in each cavity.
43 . The wafer assembly of claim 42 , further comprising a getter material in the cavity.
44 . The wafer assembly of claim 43 , further comprising a lubricant in the cavity.
45 . The wafer assembly of claim 44 , wherein the lubricant is an organic lubricant.
46 . The wafer assembly of claim 1 , wherein a mask, lubricant or a getter is present on the upper wafer.
47 . The wafer assembly of claim 1 , wherein the lower wafer is held on a lower packaging substrate.
48 . The wafer assembly of claim 47 , wherein a distance between the upper and lower wafer is from 1 to 100 microns.
49 . The wafer assembly of claim 48 , wherein a distance between the upper and lower wafer is from 1 to 250 microns.
50 . The wafer assembly of claim 43 , wherein the getter is a moisture getter.
51 . The wafer assembly of claim 43 , wherein the getter is a particle getter.
52 . The wafer assembly of claim 43 , wherein the getter is a hydrogen getter.
53 . The wafer assembly of claim 43 , wherein the getter is a metal oxide or zeolite getter.
54 . The wafer assembly of claim 43 , wherein the getter is a combination getter.
55 . The wafer assembly of claim 1 , wherein a group of the mirror edges of the mirrors is neither parallel nor perpendicular to the edges of the active area, and another group of the edges is parallel to active area edges.
56 . The wafer assembly of claim 1 , wherein the mirror element edges are approximately 45 degrees relative to the active area edges.
57 . The wafer assembly of claim 1 , wherein no mirror element edges are parallel or perpendicular to edges of the active area.
58 . The wafer assembly of claim 57 , wherein each mirror element has a switching axis that is at a non-parallel and non-perpendicular angle to at least one edge of the mirror.
59 . The wafer assembly of claim 1 , wherein each mirror element has a switching axis parallel to at least one edge of the active area.
60 . The wafer assembly of claim 59 , wherein each mirror element has a switching axis at an angle of from 40 to 55 degrees to one or more edges of each mirror.
61 . The wafer assembly of claim 1 , wherein each mirror element has a front edge that is non-perpendicular to any edge of the active area.
62 . The wafer assembly of claim 1 , wherein each mirror element is a square mirror having four edges defining the square mirror, wherein the four edges of each mirror is neither parallel nor perpendicular to any edges of the active area.
63 . The wafer assembly of claim 62 , wherein addressing rows connect to every other mirror.
64 . The wafer assembly of claim 62 , wherein addressing columns connect to every other mirror.
65 . The wafer assembly of claim 62 , wherein hinges are disposed below each mirror and are held on support posts.
66 . The wafer assembly of claim 1 , wherein the mirrors comprise hinges that extend parallel to the leading and trailing edges of the active area.
67 . The wafer assembly of claim 1 , wherein the mirrors have jagged edges.