Programming of configuration serial EEPROM via an external connector
View Patent ↗The present invention is directed to providing configuration data to an EEPROM within a sealed enclosure without having to open the enclosure, using a Test Interface Card (TIC) connected to a particular external multi-use port on the enclosure. The present invention is generally applicable to any sealed enclosure containing a device that receives information through an internal serial bus, where the enclosure includes ports that have both high speed, low voltage connections and lower speed DC connections. DC blocking capacitors are placed on the high speed lines, and when a TIC is inserted into the multi-use port, a voltage detection circuit coupled to the high speed connections detects a DC control voltage, tri-states a Switch On a Chip (SOC) and configures switches to connect the lower speed connections to the serial bus and an EEPROM so that the TIC can supply new configuration data to the EEPROM.
1. In an enclosure containing a first device for storing data, a second device coupled to the first device through a serial bus for accessing the stored data, the stored data configuring the second device, and a port coupled to the second device via high speed lines and lower speed lines for communicating with the second device, a system for enabling data to be stored in the first device through the port, comprising:
DC blocking capacitors inserted into the high speed lines;
first one or more switches coupled to the lower speed lines and the serial bus for selectably connecting either the lower speed lines or the second device to the first device through the serial bus; and
a voltage detection circuit coupled to at least one of the high speed lines and the first one or more switches for detecting a control voltage on the high speed lines that exceeds a normal signaling voltage and configuring the first one or more switches to connect the lower speed lines to the first device to enable data to be applied at the port and stored in the first device.
2. The system as recited in claim 1 , the voltage detection circuit coupled to the second device for tri-stating the second device upon detection of the control voltage.
3. The system as recited in claim 1 , further comprising a test interface card (TIC) connectable into the port for applying the control voltage to the high speed lines and applying data to the lower speed lines.
4. The system as recited in claim 3 , the TIC comprising:
a control voltage source connectable to the high speed lines at the port for applying the control voltage to the high speed lines.
5. The system as recited in claim 3 , further comprising:
a dongle couplable to the TIC though a serial interface for communicating with the TIC; and
a computer couplable to the dongle for controlling the application of the control voltage to the high speed lines and the application of data to the lower speed lines by the TIC.
6. The system as recited in claim 1 , further comprising:
second one or more switches coupled to the voltage detection circuit and inserted into the lower speed lines between the port and the second device and between the port and the first one or more switches for selectably connecting the lower speed lines to the first device through the serial bus while disconnecting the lower speed lines from the second device.
7. A storage system comprising the system of claim 1 .
8. A storage area network (SAN) comprising the storage system of claim 7 .
9. A switch, comprising:
a first device coupled to a serial bus for storing data;
a second device coupled to the serial bus for accessing the stored data,
wherein the stored data configures the second device and the second device is within an enclosure;
first one or more switches coupled to the serial bus for controlling a flow of data between the first device and the second device though the serial bus;
a port coupled to the second device via high speed lines and lower speed lines for communicating with the second device, the lower speed lines also being coupled to the one or more switches;
DC blocking capacitors inserted into the high speed lines; and
a voltage detection circuit coupled to at least one of the high speed lines and the first one or more switches for detecting a control voltage on the high speed lines that exceeds a normal signaling voltage and configuring the first one or more switches to connect the lower speed lines to the first device to enable data to be applied at the port and stored in the first device.
10. The switch as recited in claim 9 , the voltage detection circuit coupled to the second device for tri-stating the second device upon detection of the control voltage.
11. The switch as recited in claim 9 , further comprising:
second one or more switches coupled to the voltage detection circuit and inserted into the lower speed lines between the port and the second device and between the port and the first one or more switches for selectably connecting the lower speed lines to the first device through the serial bus while disconnecting the lower speed lines from the second device.
12. A storage system comprising the switch of claim 9 .
13. A storage area network (SAN) comprising the storage system of claim 12 .
14. In an enclosure containing a first device for storing data, a second device coupled to the first device through a serial bus for accessing the stored data, the stored data configuring the second device, and a port coupled to the second device via high speed lines and lower speed lines for communicating with the second device, a method for enabling data to be stored in the first device though the port, the method comprising:
inserting DC blocking capacitors into the high speed lines;
inserting first one or more switches into the serial bus between the first device and the second device;
coupling the lower speed lines to the first one or more switches for selectably connecting either the lower speed lines or the second device to the first device through the serial bus; and
detecting a control voltage on the high speed lines that exceeds a normal signaling voltage and configuring the first one or more switches to connect the lower speed lines to the first device to enable data to be applied at the port and stored in the first device.
15. The method as recited in claim 14 , further comprising tri-stating the second device upon detection of the control voltage.
16. The method as recited in claim 14 , further comprising connecting a test interface card (TIC) to the port for applying the control voltage to the high speed lines and applying data to the lower speed lines.
17. The method as recited in claim 16 , further comprising:
coupling a dongle to the TIC through a serial interface for communicating with the TIC; and
coupling a computer to the dongle for controlling the application of the control voltage to the high speed lines and the application of data to the lower speed lines by the TIC.
18. The method as recited in claim 14 , further comprising:
inserting second one or more switches into the lower speed lines between the port and the second device and between the port and the first one or more switches and coupling the second one or more switches to the voltage detection circuit for selectably connecting the lower speed lines to the first device through the serial bus while disconnecting the lower speed lines from the second device.