IP Library Granted Patent US 7,587,440
Granted Patent B2
US 7,587,440 · App. 11/115,204 · Granted Sep 8, 2009

Digital filter and filtering method

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Quick Facts
Patent No.
US 7,587,440
App. No.
11/115,204
Granted
Sep 8, 2009
Kind
B2
Abstract

The digital filter has a first-stage decimation filter and a second-stage decimation filter. The second-stage decimation filter has a shifter that performs shift operation on a filter coefficient, a complementer that performs complementary operation on the filter coefficient, a reset circuit that resetting the filter coefficient, and an adder that adds values selected from the filter coefficient, a shift operation result from the shifter, and a complementary operation result from the complementer.

Claims (61)

1. A digital filter comprising:

a first decimation section decimating an input signal to a signal with a first sampling frequency; and

a second decimation section performing an operation on a filter coefficient according to an output signal of the first decimation section and decimating the output signal of the first decimation section to a signal with a second sampling frequency, the second decimation section comprising:

a filter coefficient storage part pre-storing a filter coefficient;

a shift operation part acquiring a filter coefficient from the filter coefficient part and performing a shift operation on the acquired filter coefficient;

a complementary operation part acquiring a filter coefficient from the filter coefficient storage part and performing a complementary operation on the acquired filter coefficient acquired;

a reset part acquiring a filter coefficient from the filter coefficient storage part and resetting the acquired filter coefficient;

an adder part acquiring a filter coefficient from the filter coefficient storage part and adding the acquired filter coefficient, and a result of the shift operation; and

an integrator part integrating the acquired filter coefficient, the result of the complementary operation, a result of the reset part, or a result of the addition.

2. The digital filter according to claim 1 , wherein the first decimation section is a moving average filter with a third or higher order transfer function.

3. The digital filter according to claim 1 , wherein the input signal is a one-bit digital signal AD-converted at an oversampling frequency in delta-sigma conversion.

4. The digital filter according to claim 1 , wherein the filter coefficient storage part is ROM which stores a plurality of filter coefficients and outputs one of the stored filter coefficients.

5. The digital filter according to claim 1 , wherein the complementary operation part acquires the result of the addition from the adder part, and performs a complementary operation on the acquired the result of the addition.

6. The digital filter according to claim 1 , wherein

the first decimation section outputs signals with a plurality of output values including a reference value,

the shift operation part performs a shift operation on the acquired filter coefficient if the output value of the first decimation section is Nth power of 2 (N is a natural number) times greater than the reference value,

the complementary operation part performs a complementary operation on the acquired filter coefficient if the output value of the first decimation section has an opposite sign to the reference value, and

the reset part resets the acquired filter coefficient if the output value of the first decimation section is 0.

7. The digital filter according to claim 6 , wherein, if the output value of the first decimation section is an even number other than Nth power of 2 times the reference value, the shift operation part performs a shift operation a plurality of times on the acquired filter coefficient, and the adder part adds results of the shift operations.

8. The digital filter according to claim 6 , wherein, if the output value of the first decimation section is an odd number times the reference value, the shift operation part performs a shift operation on the acquired filter coefficient, and the adder part adds the acquired filter coefficient and a result of the shift operation.

9. The digital filter according to claim 8 , wherein, if the output value of the first decimation section is an even number other than Nth power of 2, times the reference value, the shift operation part performs a shift operation a plurality of times on the acquired filter coefficient, and the adder part adds results of the shift operations.

10. The digital filter according to claim 1 , wherein the second decimation section further comprises a control part controlling each operation of the shift operation part, the complementary operation part, the reset part, and the adder part according to the output signal from the first decimation section.

11. The digital filter according to claim 10 , wherein

the first decimation section outputs signals with a plurality of output values including a reference value,

the shift operation part performs a shift operation on the acquired filter coefficient if the output value of the first decimation section is Nth power of 2 (n is natural number) times greater than the reference value,

the complementary operation part performs a complementary operation on the acquired filter coefficient if the output value of the first decimation section has an opposite sign to the reference value, and

the reset part resets the acquired filter coefficient if the output value of the first decimation section is 0.

12. The digital filter according to claim 11 , wherein, if the output value of the first decimation section is an even number other than Nth power of 2, times reference value, the shift operation part performs a shift operation a plurality of times on the acquired filter coefficient, and the adder part adds results of the shift operations.

13. The digital filter according to claim 11 , wherein, if the output value of the first decimation section is an odd number times the reference value, the shift operation part performs a shift operation on the acquired filter coefficient, and the adder part adds the acquired filter coefficient and a result of the shift operation.

14. The digital filter according to claim 13 , wherein, if the output value of the first decimation section is an even number other than Nth power of 2, the reference value, the shift operation part performs a shift operation a plurality of times on the acquired filter coefficient, and the adder part adds results of the shift operations.

15. A filtering method comprising:

decimating an input signal to a signal with a first sampling frequency; and

performing a given operation on a filter coefficient according to the signal with the first sampling frequency and decimating the signal with the first sampling frequency to a signal with a second sampling frequency by a process including:

pre-storing the filter coefficients;

acquiring the filter coefficient and performing a shift operation on the acquired filter coefficient;

acquiring the filter coefficient and performing a complementary operation on the acquired filter coefficient;

acquiring the filter coefficient and resetting the acquired filter coefficient;

acquiring the filter coefficient and adding the acquired filer coefficient, and a result of the shift operation; and

integrating the acquired filter coefficient, the result of the shift operation, the result of the complementary operation, a result of the reset part, or a result of the addition.

16. The filtering method of claim 15 , wherein the decimation to the signal with the second sampling frequency further comprises controlling each of the shift operation, the complementary operation, the reset, and the addition according to the signal with the first sampling frequency.

17. The filtering method of claim 15 , wherein

output of the decimation to the signal with the first sampling frequency includes a plurality of output values including a reference value,

the decimation to the signal with the second sampling frequency performs shift operation on the acquired filter coefficient if the output value is Nth power of 2 (N is a natural number) times greater than the reference value, performs a complementary operation on the acquired filter coefficient if the output value has a sign opposite to the reference value, and resets the acquired filter coefficient if the output value is 0.

18. The filtering method of claim 17 , wherein, if the output value is an odd number times the reference value, the decimation to the signal with the second sampling frequency performs a shift operation on the acquired filter coefficient, and adds the acquired filter coefficient and a result of the shift operation.

19. The filtering method of claim 17 , wherein, if the output value of the first decimation section is even number other than times the reference value, the decimation to the signal with the second sampling frequency performs a shift operation a plurality of times on the acquired filter coefficient, and adds the results of the shift operations.

20. A digital filter performing an operation on a filter coefficient according to a signal with a first sampling frequency to decimate the signal with the first sampling frequency to a signal with a second sampling frequency, the digital filter comprising:

a filter coefficient storage part pre-storing a filter coefficient;

a shift operation part acquiring a filter coefficient from the filter coefficient storage part and performing a shift operation on the acquired filter coefficient;

a complementary operation part acquiring a filter coefficient from the filter coefficient storage part and performing a complementary operation on the acquired filter coefficient;

a reset part acquiring a filter-coefficient from the filter coefficient storage part and resetting the acquired filter coefficient;

an adder part acquiring a filter coefficient from the filter coefficient storage part and adding the acquired filter coefficient, and a result of the shift operation; and

an integrator section integrating the acquired filter coefficient, the result of the shift operation, the result of the complementary operation, a result of the reset part, or a result of the addition.

21. The digital filter of claim 20 , further comprises a control part controlling each operation of the shift operation part, the a complementary operation part, the rest part, and the adder part according to the signal with the first sampling frequency.

22. A digital filter performing a given operation on a filter coefficient according to a signal with a first sampling frequency and decimating the signal with the first sampling frequency to a signal with a second sampling frequency, the digital filter comprising:

a filter coefficient storage part pre-storing a filter coefficient;

a shift operation part acquiring a filter coefficient from the filter coefficient storage part and performing a shift operation on the acquired filter coefficient;

a reset part acquiring a filter coefficient from the filter coefficient storage part and resetting the acquired filter coefficient;

an adder part acquiring a filter coefficient from the filter coefficient storage part and adding the acquired filter coefficient, and a result of the shift operation; and

an integrator section integrating the acquired filter coefficient, the result of the shift operation, a result of the reset part, or a result of the addition.

23. The digital filter according to claim 22 , further comprises a complementary operation part that acquires a filter coefficient from the filter coefficient storage part, and performs a complementary operation on at least one of the acquired filter coefficient, the result of the shift operation, or the result of the addition.

24. The digital filter according to claim 22 , further comprises a control part controlling each operation of the shift operation part, the reset part, and the adder part according to the signal with the first sampling frequency.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Nov 11, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025346/0868 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2005
From: ARAMAKI, YOSHINORI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 016514/0448 →