IP Library Granted Patent US 7,223,661
Granted Patent B2
US 7,223,661 · App. 11/120,531 · Granted May 29, 2007

Method of manufacturing semiconductor device

Assignee: Hynix Semiconductor, Inc.
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Quick Facts
Patent No.
US 7,223,661
App. No.
11/120,531
Granted
May 29, 2007
Kind
B2
Abstract

The method includes forming an isolation film on a silicon substrate to define an active region; forming an antireflective film on an entire surface of the substrate containing the isolation film; forming a photosensitive film pattern on the antireflective film while exposing a portion of the isolation film or the active region adjacent to the isolation film; etching the antireflective film, the isolation film, and the substrate by using the photosensitive film pattern as an etching mask to recess the active region; performing a light etch treatment on a substrate resultant without removing the remaining photosensitive film pattern, so as to remove a damaged layer and a carbon pollutant formed on a surface of the recessed active region; and removing the remaining photosensitive film pattern and the antireflective film.

Claims (35)

1. A method of manufacturing a semiconductor device to form a STAR (step-gated asymmetry recess) cell, comprising the steps of:

forming an isolation film on a silicon substrate to define an active region;

forming an antireflective film on an entire surface of the substrate containing the isolation film;

forming a photosensitive film pattern on the antireflective film while exposing a portion of the isolation film or the active region adjacent to the isolation film;

etching the antireflective film, the isolation film, and the substrate by using the photosensitive film pattern as an etching mask to form a recess in the active region;

performing a light etch treatment on a substrate resultant without removing the remaining photosensitive film pattern, so as to remove a damaged layer and a carbon pollutant formed on a surface of the recessed active region; and

removing the remaining photosensitive film pattern and the antireflective film,

wherein the light etch treatment is performed by utilizing a gas not containing a carbon source,

wherein the light etch treatment is performed by utilizing a gas of SF 6 , NF 3 , Cl 2 and HBr as a main etching gas.

2. A method of manufacturing a semiconductor device to form a STAR (step-gated asymmetry recess) cell, comprising the steps of:

forming an isolation film on a silicon substrate to define an active region;

forming an antireflective film on an entire surface of the substrate containing the isolation film;

forming a photosensitive film pattern on the antireflective film while exposing a portion of the isolation film or the active region adjacent to the isolation film;

etching the antireflective film, the isolation film, and the substrate by using the photosensitive film pattern as an etching mask to form a recess in the active region;

performing a light etch treatment on a substrate resultant without removing the remaining photosensitive film pattern, so as to remove a damaged layer and a carbon pollutant formed on a surface of the recessed active region; and

removing the remaining photosensitive film pattern and the antireflective film,

wherein the light etch treatment is performed by utilizing a gas not containing a carbon source,

wherein the light etch treatment is performed by utilizing CF 4 as a main etching gas and any one of O 2 , Ar, N 2 and H 2 as a dilute gas, while applying a low power lower than 100 W.

3. The method of claim 2 , wherein the dilute gas consists essentially of O 2 or Ar.

4. The method of claim 2 , wherein the dilute gas includes O 2 and Ar.

5. The method of claim 2 , wherein the dilute gas includes N 2 and H 2 .

6. A method of manufacturing a semiconductor device, the method comprising:

forming an isolation structure over a semiconductor substrate to define an active region on the substrate;

forming an antireflective film over the isolation structure and the active region;

forming a photosensitive film pattern over the antireflective film exposing a first portion of the antireflective film directly overlying a second portion of the isolation film and a third portion of the active region adjacent to the isolation structure;

etching the exposed first portion of the antireflective film to expose the second portion of the isolation structure and the third portion of the active region;

etching the exposed second portion of the isolation structure and the exposed third portion of the active region to form a recess having a step defined by the etching of the first portion of the isolations structure and the second portion of the active region;

performing a light etch treatment on the substrate including the recess without removing the photosensitive film pattern, so as to remove a damaged layer and a carbon pollutant formed on a surface of the etched second portion of the active region; and

thereafter, removing the photosensitive film pattern and the antireflective film.

7. The method of claim 6 , wherein the recess having a step defining a step-gated asymmetry recess.

8. The method of claim 7 , wherein the light etch treatment is performed by utilizing a gas not containing a carbon source.

9. The method of claim 7 , wherein the light etch treatment is performed by utilizing a main etching gas including CF 4 and a dilute gate including at least one selected from the group consisting of O 2 , Ar, N 2 , H 2 , and a combination thereof.

10. The method of claim 9 , wherein the light etch treatment is performed by applying a power of no more than 100 W.

11. The method of claim 7 , wherein the light etching treatment is performed by utilizing a gas of SF 6 , NF 3 , Cl 2 and HBr as a main etch gas.

12. The method of claim 7 , wherein the etching-the-exposed-first-portion step, the etching-of-the-second-portion step, and the performing-a-light-etch-treatment step are all performed in-situ.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 2, 2005
From: KIM, JAE YOUNG; NAM, KI WON
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 016527/0796 →
Priority Claims (1)
KR 10-2004-0113633 · Dec 28, 2004 · national
Continuity (1)
Related Publication 20060141796A1 · Jun 29, 2006