PLL circuit and frequency setting circuit using the same

1. A PLL circuit comprising:

a phase shifter including a transconductance amplifier (referred to as an “OTA”) and a capacitor, said phase shifter receiving an alternating current (AC) signal with a predetermined frequency as an input signal and outputting a signal obtained by shifting a phase of the input signal by a predetermined phase;

a phase comparator for receiving the input signal fed to said phase shifter and an output signal from said phase shifter and outputting a signal corresponding to a phase difference between the received signals;

a loop filter for receiving the output signal from said phase comparator and outputting a direct current (DC) voltage; and

a differential amplifier for receiving and differentially amplifying the output voltage of said loop filter and a reference voltage;

wherein an output voltage of said differential amplifier or a signal obtained by converting the output voltage to a current by a voltage-to-current converter circuit is fedback to said phase shifter as a control signal and a transconductance (gm) of the OTA constituting said phase shifter is controlled based on said control signal so as to make the phase difference given by said phase shifter become a constant value; and

wherein the reference voltage is set to be less than a half of a power supply voltage.

2. The PLL circuit according to claim 1 , wherein said phase shifter shifts the phase by 45 degrees; and

wherein the reference voltage is set to one fourth of the power supply voltage.

3. The PLL circuit according to claim 1 , further comprising:

a charging unit for charging at least one capacitor constituting said loop filter for receiving the output signal from said phase comparator and outputting the DC voltage;

said capacitor being charged to a voltage substantially equal to the reference voltage, by said charging unit.

4. The PLL circuit according to claim 3 , wherein said charging unit includes a switching circuit for controlling on and off of a connection between said at least one capacitor constituting said loop filter and the reference voltage.

5. A circuit having a phase locked loop (PLL), comprising:

a phase shifter comprising a transconductance amplifier (referred to as an “OTA”) and a capacitor, said phase shifter receiving an alternating current (AC) signal with a predetermined frequency as an input signal and outputting a signal obtained by shifting a phase of the input signal by a predetermined phase, said phase shifter further including an odd-order filter;

a phase comparator for receiving the input signal fed to said phase shifter and an output signal from said phase shifter and outputting a signal corresponding to a phase difference between the received signals;

an amplifier for amplifying a direct current (DC) voltage of the output signal from said phase comparator, an output of said amplifier providing said control signal to change said transconductance (gm) of the OTA, said amplifier comprising a differential amplifier for receiving and differentially amplifying the direct current (DC) voltage and a reference voltage; and

a filter for smoothing the output of said phase comparator, said filter integrally provided with said differential amplifier,

wherein a transconductance (gm) of the OTA comprising said phase shifter is changed based on said phase difference, as a control signal to make the phase difference given by said phase shifter become a constant value.

6. The circuit according to claim 5 , wherein the reference voltage is set to a voltage equal to or less than a half of a power supply voltage.

7. The circuit according to claim 6 , wherein the reference voltage is set to one fourth of the power supply voltage.