Memory latency of processors with configurable stride based pre-fetching technique
View Patent ↗A method and apparatus for retrieving instructions to be processed by a microprocessor is provided. By pre-fetching instructions in anticipation of being requested, instead of waiting for the instructions to be requested, the latency involved in requesting instructions from higher levels of memory may be avoided. A pre-fetched line of instruction may be stored into a pre-fetch buffer residing on a microprocessor. The pre-fetch buffer may be used by the microprocessor as an alternate source from which to retrieve a requested instruction when the requested instruction is not stored within the first level cache. The particular line of instruction being pre-fetched may be identified based on a configurable stride value. The configurable stride value may be adjusted to maximize the likelihood that a requested instruction, not present in the first level cache, is present in the pre-fetch buffer. The configurable stride value may be updated manually or automatically.
1. A machine-implemented method for retrieving instructions, comprising the steps of:
monitoring characteristics of a pre-fetch buffer to determine whether to adjust a configurable stride value, wherein the pre-fetch buffer stores instructions that are anticipated to be requested in the future, wherein the characteristics of the pre-fetch buffer comprise:
a number of hits to the pre-fetch buffer that are not hits to a first level cache;
a ratio of hits to the pre-fetch buffer to lines of instructions installed in the pre-fetch buffer; and
how many explicit requests for lines of instructions are currently being pre-fetched, but have not yet been retrieved from memory;
in response to a determination to adjust the configurable stride value, determining whether to increase or decrease the configurable stride value based on the characteristics;
receiving an indication that an instruction requested by an instruction execution component is not present in the first level cache, and wherein the instruction is in a first line of instructions;
determining, based upon the configurable stride value, a subsequent line of instructions to retrieve, wherein the subsequent line of instructions is X lines of instructions after the first line of instruction, wherein X is an integer, and wherein the value of X depends upon the configurable stride value; and
retrieving the subsequent line of instructions, wherein the subsequent line of instructions is retrieved in anticipation of being requested in the future.
2. The method of claim 1 , wherein determining the subsequent line of instructions to retrieve comprises:
accessing a register which stores the configurable stride value, wherein the configurable stride value indicates how many lines of instructions to skip from a current line of instructions.
3. The method of claim 1 , further comprising:
determining whether the instruction was present in the pre-fetch buffer.
4. The method of claim 1 , further comprising:
storing the subsequent line of instructions in the pre-fetch buffer.
5. The method of claim 1 , further comprising:
in response to determining that the monitored characteristics of the pre-fetch buffer indicate that the configurable stride value should be adjusted, adjusting the configurable stride value without receiving user input.
6. The method of claim 1 , further comprising:
in response to receiving user input, changing the value of the configurable stride value.
7. An apparatus for retrieving instructions, said apparatus configured to:
monitor characteristics of a pre-fetch buffer to determine whether to adjust a configurable stride value, wherein the pre-fetch buffer stores instructions that are anticipated to be requested in the future, wherein the characteristics of the pre-fetch buffer comprise:
a number of hits to the pre-fetch buffer that are not hits to a first level cache;
a ratio of hits to the pre-fetch buffer to lines of instructions installed in the pre-fetch buffer; and
how many explicit requests for lines of instructions are currently being pre-fetched, but have not yet been retrieved from memory;
determine, in response to a determination to adjust the configurable stride value, whether to increase or decrease the configurable stride value based on the monitored characteristics,
receive an indication that an instruction requested by an instruction execution component is not present in the first level cache, and wherein the instruction is in a first line of instructions;
determine, based upon the configurable stride value, a subsequent line of instructions to retrieve, wherein the subsequent line of instructions is X lines of instructions after the first line of instruction, wherein X is an integer, and wherein the value of X depends upon the configurable stride value; and
retrieve the subsequent line of instructions, wherein the subsequent line of instructions is retrieved in anticipation of being requested in the future.
8. The apparatus of claim 7 , wherein to determine the subsequent line of instructions to retrieve said apparatus is further configured to:
access a register which stores the configurable stride value, wherein the configurable stride value indicates how many lines of instructions to skip from a current line of instructions.
9. The apparatus of claim 7 , wherein said apparatus is further configured to:
determine whether the instruction was present in the pre-fetch buffer.
10. The apparatus of claim 7 , wherein said apparatus is further configured to:
store the subsequent line of instructions in the pre-fetch buffer.
11. The apparatus of claim 7 , wherein said apparatus is further configured to:
in response to determining that the monitored characteristics of the pre-fetch buffer indicate that the configurable stride value should be adjusted, adjust the configurable stride value without receiving user input.
12. The apparatus of claim 7 , wherein said apparatus is further configured to:
in response to receiving user input, change the value of the configurable stride value.