Patent Assignment
Reel/Frame 037302/0899
Merger and Change of Name
Recorded: 2015-12-16
Pages: 11
Assignors
ORACLE USA, INC.
Executed: 2010-02-12
SUN MICROSYSTEMS, INC.
Executed: 2010-02-12
ORACLE AMERICA, INC.
Executed: 2010-02-12
Assignee
ORACLE AMERICA, INC.
500 ORACLE PARKWAY, REDWOOD SHORES, CALIFORNIA, 94065
Covered Properties
(100)
Computer Architecture Having a Stateless Human Interface Device and Methods of Use
Patent:
7,346,689 →
Application:
09/063,335 →
Dynamic Embedding of Literal Object Data in Supplied Instance of Information Object
Patent:
7,340,499 →
Application:
09/454,427 →
Decoupling Access Control from Key Management in a Network
Patent:
7,336,790 →
Application:
09/458,020 →
Mechanism for Caching Dynamically Generated Content
Customizable Two Step Mapping of Extensible Markup Language Data in an E-Procurement System and Method
Storage Network Data Replicator
Methods and Apparatus for Distributing Interrupts
Providing Peer Groups in a Peer-to-Peer Environment
Method and Apparatus for Managing Data Time-Outs
Object Mutation Determination for Incremental State Saves
Synchronization of Documents Between a Server and Small Devices
On Demand, Network Accessible, Run Time Compile Server
Dynamic Location Storage and Retrieval in a Wireless Portal Server
Prefetching Techniques for Network Interfaces
Detecting and Mitigating Soft Errors Using Duplicative Instructions
Collaborative Content Coherence Using Mobile Agents in Peer-to-Peer Networks
System and Method for Presenting Time Related Data on a Small Screen Device
Cross Platform Locale Data Name Mapping Interfaces and Methods of Use Thereof
Method and Apparatus for Performing an Address Lookup Using a Multi-Bit Trie with Backtracking
Emi Reduction Using Tunable Delay Lines
Method and Apparatus for Starvation-Free Scheduling of Communications
Blocking Access to Selected Apis
Method and System for Detecting Deprecated Elements During Runtime
Transmitting Odd-Sized Packets Over a Double Data Rate Link
Method and Apparatus for a Transaction-Based Secure Storage File System
System and Method for Interprocess Services Client Artifact Download
Generic Modular Multiplier Using Partial Reduction
Method and System for Selectively Retrieving Updated Information from One or More Websites
Error Management
Method and System for Managing Resource Allocation in Non-Uniform Resource Access Computer Systems
Proximity-Based Addressing for Supporting in-Place Execution in Virtual Machines
System and Method for Cross Platform and Configuration Build System
Systems and Methods for Mapping Api Calls
Software Transactional Memory for Dynamically Sizable Shared Data Structures
Method, System, and Program for Dispatching a Method Call
Patent:
7,318,229 →
Application:
10/630,485 →
Methods and Apparatus for Selecting Processes for Execution
Patent:
7,318,128 →
Application:
10/633,258 →
Computer Assembly
Methods for Execution Control Acquisition of a Program and for Executing an Optimized Version of a Program
Virtual Machine with Securely Distributed Bytecode Verification
Method and Apparatus for Preventing Spanning Tree Loops During Traffic Overload Conditions
Method and System for Transmitting Packet Chains
Method, System and Article of Manufacture for Discovering Devices in a Network Monitoring System
Patent:
7,343,409 →
Application:
10/685,243 →
Method for Graphically Displaying Hardware Performance Simulators
Patent:
7,331,039 →
Application:
10/688,763 →
Error Reporting to Diagnostic Engines Based on Their Diagnostic Capabilities
System and Method for Encoding Trace Framework Enabling in an Object File
Patent:
7,334,221 →
Application:
10/714,244 →
Method and Pipeline Architecture for Processing Multiple Swap Requests to Reduce Latency
Updating Profile Frequency for Procedure Inlining
Handling Register Dependencies Between Instructions Specifying Different Width Registers
Patent:
7,340,590 →
Application:
10/734,763 →
Method and Apparatus for Creating a Robust Highly Connected Direct Interconnection Network
Patent:
7,333,444 →
Application:
10/739,475 →
System and Method for Performing Incremental Initialization of a Master Runtime System Process
Patent:
7,343,603 →
Application:
10/745,164 →
Methods and Apparatus to Preserve Software Modifications
Patent:
7,340,719 →
Application:
10/745,990 →
Efficient Read After Write Bypass
Patent:
7,343,477 →
Application:
10/747,584 →
Virtual System Console for Virtual Application Environment
Patent:
7,337,445 →
Application:
10/767,003 →
Dynamic Distribution of Test Execution
Patent:
7,334,162 →
Application:
10/767,845 →
Contact Load Profile Modification for a Compression Socketed Cpu
Patent:
7,323,363 →
Application:
10/770,192 →
Cooling Failure Mitigation for an Electronics Enclosure
Methods and Systems for Reducing a Program Size
Patent:
7,313,789 →
Application:
10/789,530 →
Method and Apparatus for Hybrid Group Key Management
Adaptive Synchronization Method for Communication in Storage Systems
Patent:
7,337,248 →
Application:
10/805,110 →
Clock Distribution Architecture with Spread Spectrum
Patent:
7,334,149 →
Application:
10/809,156 →
System and Method for Interleaving Infiniband Sends and Rdma Read Responses in a Single Receive Queue
Patent:
7,342,934 →
Application:
10/811,642 →
Combined Buffering of Infiniband Virtual Lanes and Queue Pairs
Patent:
7,327,749 →
Application:
10/812,254 →
Mechanism and Method for Cache Snoop Filtering
Patent:
7,325,102 →
Application:
10/821,430 →
Value Prediction for Missing Read Operations Instances
Patent:
7,340,567 →
Application:
10/824,307 →
Method and Apparatus for Maintaining an Accurate Inventory of Storage Capacity in a Clustered Data Processing System
Patent:
7,340,578 →
Application:
10/833,454 →
In-Line Server Health Checking
Patent:
7,313,735 →
Application:
10/836,676 →
Conflictless Replication in a Multi-Master Directory System
Service Redundancy
Non-Volatile Fault Indication
Patent:
7,321,312 →
Application:
10/863,111 →
Bandwidth Reduction Technique in a Snooping-Based Cache-Coherent Cluster of Multiprocessing Nodes
Patent:
7,315,919 →
Application:
10/868,053 →
Dynamic Reverse Proxy
Patent:
7,333,990 →
Application:
10/873,680 →
Minimal Address State in a Fine Grain Multithreaded Processor
Patent:
7,343,474 →
Application:
10/881,616 →
Method and System for Remote Execution of Code on a Distributed Data Storage System
Patent:
7,328,303 →
Application:
10/883,243 →
Method for Monitoring Heap for Memory Leaks
Patent:
7,325,106 →
Application:
10/893,090 →
System and Method to Increase Memory Allocation Efficiency
Patent:
7,337,201 →
Application:
10/933,569 →
Integrated Circuit Cooling Apparatus and Method
Patent:
7,342,787 →
Application:
10/941,115 →
Method and Apparatus for Using Memory Compression to Enhance Error Correction
Patent:
7,340,666 →
Application:
10/944,172 →
Mechanisms for Supporting Back Button Function of Web Browser as Web Service Server in Interaction with Business Process Engine
Slam Latch for Rackmount Rail
Patent:
7,318,532 →
Application:
10/968,686 →
System and Method for Dynamic Memory Interleaving and De-Interleaving
Patent:
7,318,114 →
Application:
10/978,249 →
Garbage-First Garbage Collection
Patent:
7,340,494 →
Application:
10/985,447 →
Automatic Device Strength Based Sensitization Generation for Sequential Elements
Patent:
7,325,207 →
Application:
11/007,942 →
Method and Apparatus for Forwarding References to Objects Concurrently with Space-Incremental Garbage Collection
Patent:
7,321,909 →
Application:
11/021,287 →
Method and System for Timing Modeling for Custom Circuit Blocks
Patent:
7,328,416 →
Application:
11/042,043 →
Method and System for Verification of Soft Error Handling with Application to Cmt Processors
Patent:
7,320,114 →
Application:
11/049,990 →
Synchronization Primitives for Flexible Scheduling of Functional Unit Operations
Patent:
7,320,063 →
Application:
11/051,431 →
Chemical Time Modification of an Object
Patent:
7,321,307 →
Application:
11/062,399 →
Exclusive Lease Instruction Support for Transient Blocking Synchronization
Patent:
7,346,747 →
Application:
11/078,120 →
Integrated Circuit Binning and Layout Design System
Patent:
7,340,710 →
Application:
11/108,507 →
Memory Latency of Processors with Configurable Stride Based Pre-Fetching Technique
Patent:
7,346,741 →
Application:
11/126,913 →
Digital Phase Locked Loops for Packet Stream Rate Matching and Restamping
Patent:
7,333,468 →
Application:
11/129,798 →
Techniques for Reducing Off-Chip Cache Memory Accesses
Patent:
7,325,101 →
Application:
11/141,415 →
Decoder for Pin-Based Scan Test
Patent:
7,313,745 →
Application:
11/219,065 →
Clock Skew Modelling Using Delay Stamping
Patent:
7,325,211 →
Application:
11/219,287 →
Method and Apparatus for Distributing Signals Over Jig-Plates
Patent:
7,332,919 →
Application:
11/232,843 →
Selecting Basis Functions to Form a Regression Model for Cache Performance
Patent:
7,346,736 →
Application:
11/243,353 →
Dynamic Circular Work-Stealing Deque
Method and Apparatus to Center the Frequency of a Voltage-Controlled Oscillator
Patent:
7,315,218 →
Application:
11/321,386 →
Technique for Reducing Traffic in an Instruction Fetch Unit of a Chip Multiprocessor
Proactive Fault Monitoring of Disk Drives Through Phase-Sensitive Surveillance
Related Assignments
(3)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Oct 17, 2001
From: VISWANATH, SRIDATTA; LI, YAFENG
To: SUN MICROSYSTEMS, INC.
Reel/Frame 012281/0899 →
Assignment of Assignor's Interest
Nov 19, 2001
From: TELOH, JOHN; CROSLAND, SIMON; NEWTON, PHILIP
To: SUN MICROSYSTEMS, INC.
Reel/Frame 012318/0045 →
Assignment of Assignor's Interest
Dec 3, 2001
From: KIM, TED; GENTRY, DENTON E., JR.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 012372/0461 →