Multi-chip electronic package with reduced line skew and circuitized substrate for use therein
View Patent ↗An electronic package which includes a circuitized substrate having at least two electrical components positioned thereon. The package includes patterns of contact sites, each for having one of the components coupled thereto. The patterns of contact sites in turn are electrically interconnected by a grouping of conductive lines which, to substantially prevent skew, are of substantially the same length. A method of making the package is also provided, as is a circuitized substrate and an information handling system, the latter adapted for having one or more of the electronic packages as part thereof.
1. A circuitized substrate comprising first and second dielectric layers, a first conductive layer positioned on said first dielectric layer and a second conductive layer positioned on said second dielectric layer, said first and second conductive layers each including a plurality of conductive lines, said first conductive layer further having a first pattern of electrical component contact sites and a plurality of second patterns of electrical component contact sites substantially surrounding said first pattern of electrical component contact sites and spaced from said first pattern of electrical component contact sites, each of said patterns of electrical component contact sites including at least twenty such contact sites, each of said second patterns of electrical component contact sites surrounding said first pattern, and
a first plurality of said conductive lines interconnecting selected ones of said contacts sites of said first pattern of electrical component contact sites with selected ones of said contact sites of said second pattern of electrical component contact sites,
selected ones of said first plurality of conductive lines each including selected ones of said conductive lines of said first conductive layer and said conductive lines of said second conductive layer,
while selected ones of others of said first plurality of conductive lines including only conductive lines of said first conductive layer,
said conductive lines of said second conductive layer being electrically coupled to said selected ones of said conductive lines of said first conductive layer, said selected ones of others of said first plurality of conductive lines being of substantially the same length.
2. The circuitized substrate of claim 1 further including at least one thru-hole, said thru-hole electrically connecting at least one of said conductive lines of said first conductive layer to one of said conductive lines of said second conductive layer.
3. The circuitized substrate of claim 1 wherein said electrical component contact sites are solder ball contact pads.
4. An electronic package comprising:
a circuitized substrate including first and second dielectric layers, a first conductive layer positioned on said first dielectric layer and a second conductive layer positioned on said second dielectric layer, said first and second conductive layers each including a plurality of conductive lines, said first conductive layer further having a first pattern of electrical component contact sites and a plurality of second patterns of electrical component contact sites substantially surrounding said first pattern of electrical component contact sites and spaced from said first pattern of electrical component contact sites each of said first and second patterns of electrical component contact sites including at least twenty such contact sites, each of said second patterns of electrical component contact sites surrounding said first pattern, a first plurality of said conductive lines interconnecting selected ones of said contacts sites of said first pattern of electrical component contact sites with selected ones of said contact sites of said second patterns of electrical component contact sites,
selected ones of said first plurality of conductive lines including selected ones of said conductive lines of said first conductive layer and said conductive lines of said second conductive layer,
while selected ones of others of said first plurality of conductive lines include only conductive lines of said first conductive layer,
said conductive lines of said second conductive layer being electrically coupled to said selected ones of said conductive lines of said first conductive layer, said selected ones of others of said first plurality of conductive lines interconnecting said selected ones of said contacts sites of said first and second patterns being of substantially the same length; and
a plurality of electrical components positioned on said first conductive layer of said circuitized substrate, each of said plurality of electrical components being electrically coupled to a respective one of said first and second patterns of electrical component contact sites and therefore to one another by said selected ones of others of said first plurality of conductive lines interconnecting said selected ones of said contacts sites of said first and second patterns and which are of said substantially the same length.
5. The electronic package of claim 4 wherein each of said electrical components include at least one semiconductor chip.
6. The electronic package of claim 5 wherein the number of said electrical components is five.
7. The electronic package of claim 6 wherein at least one of said electrical components includes a main processing semiconductor chip and the remainder of said electrical components include at least one memory semiconductor chip.
8. The electronic package of claim 4 further including at least one thru-hole, said thru-hole electrically connecting at least one of said conductive lines of said first conductive layer to one of said conductive lines of said conductive layer.
9. The electronic package of claim 4 wherein said electrical component contact sites are solder ball contact pads.