IP Library Granted Patent US 7,135,909
Granted Patent B1
US 7,135,909 · App. 11/130,946 · Granted Nov 14, 2006

Temperature sensor circuit and system

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Quick Facts
Patent No.
US 7,135,909
App. No.
11/130,946
Granted
Nov 14, 2006
Kind
B1
Abstract

A method and system for sensing the temperature of an integrated circuit are presented. The method compares a first current that is proportional to a temperature reading of the integrated circuit to a reference current. While the first current is greater than the reference current, a counter is incremented, and the reference current is increased in response to incrementing the counter. A system for sensing the temperature of an integrated circuit includes a first current source providing a source current to a node. The first current source is based on an input from a proportional to absolute temperature device. The system also includes a second current source providing a sink current to the node, with the amount of sink current being based on an input from a digital control module. The system also includes a comparator coupled to the node to provide a comparator signal that indicates a relationship between the source current and the sink current.

Claims (37)

1. A temperature sensor circuit comprising:

a first current source providing a source current to a node based on an input from a proportional to absolute temperature device;

a second current source providing a sink current from the node, the amount of sink current based on a digital input from a digital control module; and

a comparator coupled to the node to provide a comparator signal that indicates a relationship between the source current and the sink current.

2. The temperature sensor circuit of claim 1 , further comprising an inverter coupled to the comparator to receive the comparator signal and to produce an inverted comparator signal output.

3. The temperature sensor circuit of claim 2 , wherein the inverted comparator signal output is coupled to an input to the digital control module.

4. The temperature sensor circuit of claim 1 , wherein the digital control module has a first clock input and a second clock input.

5. The temperature sensor circuit of claim 4 , wherein the digital control module provides a first digital temperature code output that indicates one of a plurality of temperature ranges.

6. The temperature sensor circuit of claim 5 , wherein the digital control module provides a second digital temperature code output that indicates one of a plurality of temperature ranges.

7. The temperature sensor circuit of claim 6 , wherein the first digital temperature code output is a three bit value that identifies one of eight temperature ranges and the second digital temperature code output is a four bit value that identifies one of sixteen temperature ranges.

8. The temperature sensor circuit of claim 6 , wherein the first digital temperature code output is provided to a memory refresh circuit and wherein the second digital temperature code output is provided to a digital module, and wherein the memory refresh circuit and the digital module are within the same semiconductor device as the temperature sensor circuit.

9. The temperature sensor circuit of claim 1 , wherein the second current source includes a plurality of current source elements that may be selectively summed together and wherein the digital control module includes a plurality of control signal outputs coupled to the plurality of current source elements.

10. The temperature sensor circuit of claim 9 , wherein the digital control module includes a counter and a counter decoder coupled to the counter, the counter decoder coupled to each of the plurality of control signals, wherein as the counter moves from an initial state to a final state though a step by step digital count sequence, the counter decoder sequentially applies additional ones of the control signals to activate additional current source elements, to incrementally increase a total current provided by the second current source in a step by step manner corresponding to the digital count sequence provided by the counter.

11. The temperature sensor circuit of claim 10 , wherein the counter is stopped in response to a feedback signal derived from the comparator signal output.

12. The temperature sensor circuit of claim 11 , wherein an output of the counter after the counter is stopped is stored in a memory latch device.

13. The temperature sensor circuit of claim 12 , wherein the memory latch device is a plurality of flip-flops.

14. The temperature sensor circuit of claim 12 , wherein first and second output codes are determined based on the output of the counter stored in the memory latch device.

15. The temperature sensor circuit of claim 14 , wherein the first and second output codes are selected from a high temperature code and a low temperature code based on an output of the first current source.

16. The temperature sensor circuit of claim 10 , wherein the digital control module provides a start signal to the proportional to absolute temperature device and provides a start signal to the counter.

17. The temperature sensor circuit of claim 16 , wherein the digital control module is in a powered down state prior to providing the start signal.

18. The temperature sensor circuit of claim 17 , wherein the digital control module returns to the powered down state after performing a temperature measurement and storing a temperature code.

19. The temperature sensor circuit of claim 17 , wherein the start signal is provided in response to a first clock input.

20. The temperature sensor circuit of claim 19 , wherein the counter is incremented in response to a signal derived from a second clock input.

21. The temperature sensor circuit of claim 20 , wherein the first clock input operates at a frequency of 10 Hz and the second clock input operates at a higher frequency.

22. The temperature sensor circuit of claim 1 , wherein the temperature sensor circuit uses an average of less than 10 microwatts of power.

23. The temperature sensor circuit of claim 1 , wherein the comparator output changes from a first state to a second state to indicate a substantial match between the outputs of the first current source and the second current source.

24. A semiconductor device comprising:

a digital logic module including a control circuit having a first temperature input;

a dynamic memory including a refresh rate control circuit having a second temperature input;

a temperature sensor providing a first temperature code to be applied to the first temperature input and a second temperature code to be applied to the second temperature input, the temperature sensor comprising:

a first current source that provides current proportional to a measured temperature;

a reference current source;

a comparator responsive to the first current source and the reference current source; and

a control module including a digital counter, a first input of the control module coupled to an output of the comparator, wherein the control module increments the digital counter and increases the current provided by the reference current source based on the comparator output.

25. The semiconductor device of claim 24 , wherein the control module increments the digital counter and increases the current provided by the reference current source when the comparator output indicates that the first current source is less than the reference current source.

26. The semiconductor device of claim 24 , wherein the temperature sensor enters a powered up state in response to a first clock signal.

27. The semiconductor device of claim 26 , wherein the temperature sensor enters a powered down state after providing the first and second temperature codes.

Assignments (20)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
PATENT RELEASE Recorded Aug 17, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 039707/0471 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 037354 FRAME: 0773. ASSIGNOR(S) HEREBY CONFIRMS THE PATENT RELEASE. Recorded Aug 15, 2016
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, LLC
Reel/Frame 039723/0777 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037354/0773 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037354/0734 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: SIGMATEL, INC.
Reel/Frame 037355/0838 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 7, 2015
From: ZENITH INVESTMENTS, LLC
To: APPLE INC.
Reel/Frame 034749/0791 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 19, 2014
From: SIGMATEL, L.L.C.
To: ZENITH INVESTMENTS, LLC
Reel/Frame 034295/0072 →
SECURITY AGREEMENT Recorded May 10, 2010
From: SIGMATEL, LLC
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 024358/0439 →
SECURITY AGREEMENT Recorded Mar 16, 2010
From: SIGMATEL, LLC
To: CITIBANK, N.A.
Reel/Frame 024079/0406 →
SECURITY AGREEMENT Recorded Jul 9, 2008
From: SIGMATEL, INC.
To: CITIBANK, N.A.
Reel/Frame 021212/0372 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2005
From: WILLIS, JOHN
To: SIGMATEL, INC.
Reel/Frame 016581/0964 →