IP Library Granted Patent US 7,662,674
Granted Patent B2
US 7,662,674 · App. 11/133,835 · Granted Feb 16, 2010

Methods of forming electromigration and thermal gradient based fuse structures

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Quick Facts
Patent No.
US 7,662,674
App. No.
11/133,835
Granted
Feb 16, 2010
Kind
B2
Abstract

Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a metallic fuse structure by forming at least one via on a first interconnect structure, lining the at least one via with a barrier layer, and then forming a second interconnect structure on the at least one via.

Claims (13)

1. A method comprising:

forming at least one via on a first interconnect structure;

lining the at least one via with a barrier layer;

forming a second interconnect structure on a top surface of the at least one via to form a metallic fuse structure comprising the lined via disposed between the first and second interconnect structures; and

applying a sufficient amount of current to the metallic fuse structure to induce at least one void to be formed within the first interconnect structure of the metallic fuse structure.

2. The method of claim 1 wherein the barrier layer comprises at least one of tantalum, tantalum nitride, titanium, and titanium nitride.

3. The method of claim 1 wherein lining the at least one via comprises forming a barrier layer on the sidewalls and a bottom surface of the at least one via.

4. The method of claim 1 wherein forming the metallic fuse structure comprises wherein at least one of the first interconnect structure, the second interconnect structure and the at least one via comprises at least one of copper and aluminum, and wherein the metallic fuse structure is substantially free from a silicide.

5. The method of claim 1 wherein forming the at least one via on the first interconnect structure further comprises wherein a length of the first interconnect structure is at least about 1.5 times greater than at least one of the critical length for electromigration and the thermal decay length of the first interconnect structure.

6. The method of claim 1 wherein a width of the second interconnect structure is at least about 1.5 times wider than a width of the first interconnect structure.

7. The method of claim 1 wherein applying a sufficient amount of current comprises applying a sufficient amount of current wherein the amount of current supplies an amount of heat that is approximately below the melting temperature of the metallic fuse structure, wherein the at least one void does not substantially damage the region surrounding the at least one void.

8. The method of claim 1 wherein applying a sufficient amount of current to induce at least one void to be formed comprises programming the metallic fuse structure by inducing at least one void to be formed that changes a first resistance value of the metallic fuse structure to a second resistance value.

9. The method of claim 1 wherein applying a sufficient amount of current comprises applying a sufficient amount of current to induce at least one of electromigration and a temperature gradient.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 15, 2022
From: INTEL CORPORATION
To: TAHOE RESEARCH, LTD.
Reel/Frame 061175/0176 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 6, 2005
From: MAIZ, JOSE A.; HE, JUN; BOHR, MARK
To: INTEL CORPORATION
Reel/Frame 016948/0956 →