Semiconductor device comprising a superlattice dielectric interface layer
A semiconductor device may include a semiconductor substrate and at least one active device adjacent the semiconductor substrate. The at least one active device may include an electrode layer, a high-K dielectric layer underlying the electrode layer and in contact therewith, and a superlattice underlying the high-K dielectric layer opposite the electrode layer and in contact with the high-K dielectric layer. The superlattice may include a plurality of stacked groups of layers. Each group of layers of the superlattice may include a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.
1 . A semiconductor device comprising:
a semiconductor substrate; and
at least one active device adjacent said semiconductor substrate and comprising
an electrode layer,
a high-K dielectric layer underlying said electrode layer and in contact therewith, and
a superlattice underlying said high-K dielectric layer opposite said electrode layer and in contact with said high-K dielectric layer, said superlattice comprising a plurality of stacked groups of layers,
each group of layers of said superlattice comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions.
2 . The semiconductor device of claim 1 wherein said high-K dielectric layer has a dielectric constant of greater than about five.
3 . The semiconductor device of claim 1 wherein said high-K dielectric layer has a dielectric constant of greater than about ten.
4 . The semiconductor device of claim 1 wherein said high-K dielectric layer has a dielectric constant of greater than about twenty.
5 . The semiconductor device of claim 1 wherein said at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions is less than about five monolayers to thereby function as an energy band-modifying layer.
6 . The semiconductor device of claim 1 wherein said at least one active device further comprises a channel region underlying said superlattice.
7 . The semiconductor device of claim 6 wherein said at least one active device further comprises source and drain regions adjacent said channel region.
8 . The semiconductor device of claim 1 wherein said high-K dielectric layer comprises at least one of silicon oxide, zirconium oxide, and hafnium oxide.
9 . The semiconductor device of claim 1 wherein said base semiconductor comprises silicon.
10 . The semiconductor device of claim 1 wherein said at least one non-semiconductor monolayer comprises oxygen.
11 . The semiconductor device of claim 1 wherein said at least one non-semiconductor monolayer comprises a non-semiconductor selected from the group consisting essentially of oxygen, nitrogen, fluorine, and carbon-oxygen.
12 . The semiconductor device of claim 1 wherein said at least one non-semiconductor monolayer is a single monolayer thick.
13 . The semiconductor device of claim 1 wherein each base semiconductor portion is less than eight monolayers thick.
14 . The semiconductor device of claim 1 wherein all of said base semiconductor portions are a same number of monolayers thick.
15 . The semiconductor device of claim 1 wherein at least some of said base semiconductor portions are a different number of monolayers thick.
16 . The semiconductor device of claim 1 wherein opposing base semiconductor monolayers in adjacent groups of layers of the superlattice are chemically bound together.
17 . A semiconductor device comprising:
a semiconductor substrate; and
at least one active device adjacent said semiconductor substrate and comprising
an electrode layer,
a high-K dielectric layer having a dielectric constant of greater than about five underlying said electrode layer and in contact therewith, and
a superlattice underlying said high-K dielectric layer opposite said electrode layer and in contact with said high-K dielectric layer, said superlattice comprising a plurality of stacked groups of layers,
each group of layers of said superlattice comprising a plurality of stacked base silicon monolayers defining a base silicon portion and an energy band-modifying layer comprising at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions.
18 . The semiconductor device of claim 17 wherein said high-K dielectric layer has a dielectric constant of greater than about twenty.
19 . The semiconductor device of claim 17 wherein said at least one non-semiconductor monolayer constrained within the crystal lattice of adjacent base semiconductor portions is less than about five monolayers to thereby function as an energy band-modifying layer.
20 . The semiconductor device of claim 17 wherein said at least one active device further comprises a channel region underlying said superlattice.
21 . The semiconductor device of claim 20 wherein said at least one active device further comprises source and drain regions adjacent said channel region.
22 . The semiconductor device of claim 1 wherein said high-K dielectric layer comprises at least one of silicon oxide, zirconium oxide, and hafnium oxide.